diff --git a/db845c/Android.mk b/db845c/Android.mk
new file mode 100644
index 0000000..6f725c0
--- /dev/null
+++ b/db845c/Android.mk
@@ -0,0 +1,6 @@
+LOCAL_PATH := $(call my-dir)
+
+# If some modules are built directly from this directory (not subdirectories),
+# their rules should be written here.
+
+include $(call all-makefiles-under,$(LOCAL_PATH))
diff --git a/db845c/device.mk b/db845c/device.mk
index 54e0705..d15e188 100644
--- a/db845c/device.mk
+++ b/db845c/device.mk
@@ -27,3 +27,6 @@
 
 # Build generic Audio HAL
 PRODUCT_PACKAGES := audio.primary.db845c
+
+# Copy firmware files
+$(call inherit-product-if-exists, $(LOCAL_PATH)/firmware/device.mk)
diff --git a/db845c/firmware/Android.mk b/db845c/firmware/Android.mk
new file mode 100644
index 0000000..6cdcfd7
--- /dev/null
+++ b/db845c/firmware/Android.mk
@@ -0,0 +1,103 @@
+LOCAL_PATH := $(call my-dir)
+
+include device/linaro/dragonboard/utils.mk
+
+# Firmware files copied over from
+# http://releases.linaro.org/96boards/dragonboard845c/qualcomm/firmware/RB3_firmware_20190529180356-v3.zip
+
+# Adreno
+firmware_files :=	\
+    a630_gmu.bin	\
+    a630_sqe.fw		\
+    a630_zap.b00	\
+    a630_zap.b01	\
+    a630_zap.b02	\
+    a630_zap.elf	\
+    a630_zap.mdt
+
+# DSP (adsp+cdsp)
+firmware_files +=	\
+    adsp.b00		\
+    adsp.b01		\
+    adsp.b02		\
+    adsp.b03		\
+    adsp.b04		\
+    adsp.b05		\
+    adsp.b06		\
+    adsp.b07		\
+    adsp.b08		\
+    adsp.b09		\
+    adsp.b10		\
+    adsp.b11		\
+    adsp.b12		\
+    adsp.b13		\
+    adsp.mdt		\
+    cdsp.b00		\
+    cdsp.b01		\
+    cdsp.b02		\
+    cdsp.b03		\
+    cdsp.b04		\
+    cdsp.b05		\
+    cdsp.b06		\
+    cdsp.b08		\
+    cdsp.mdt
+
+# USB
+firmware_files +=	\
+    K2026090.mem
+
+# Wlan
+firmware_files +=	\
+    bdwlan.102		\
+    bdwlan.104		\
+    bdwlan.105		\
+    bdwlan.106		\
+    bdwlan.107		\
+    bdwlan.108		\
+    bdwlan.109		\
+    bdwlan.10b		\
+    bdwlan.10c		\
+    bdwlan.b04		\
+    bdwlan.b07		\
+    bdwlan.b09		\
+    bdwlan.b0a		\
+    bdwlan.b0b		\
+    bdwlan.b0d		\
+    bdwlan.b0e		\
+    bdwlan.b0f		\
+    bdwlan.b14		\
+    bdwlan.b15		\
+    bdwlan.b30		\
+    bdwlan.b31		\
+    bdwlan.b32		\
+    bdwlan.b33		\
+    bdwlan.b34		\
+    bdwlan.b35		\
+    bdwlan.b36		\
+    bdwlan.b37		\
+    bdwlan.b38		\
+    bdwlan.b39		\
+    bdwlan.b3a		\
+    bdwlan.b3c		\
+    bdwlan.b3d		\
+    bdwlan.b3e		\
+    bdwlan.b3f		\
+    bdwlan.b41		\
+    bdwlan.b42		\
+    bdwlan.b45		\
+    bdwlan.b70		\
+    bdwlan.bin		\
+    bdwlan.txt		\
+    wlanmdsp.mbn
+
+# I2C/SPI fix
+firmware_files +=	\
+    devcfg.mbn
+
+# License
+firmware_files +=	\
+    LICENSE.qcom.txt
+
+$(foreach f, $(firmware_files), $(call add-qcom-firmware, $(f), $(TARGET_OUT_VENDOR)/firmware/))
+
+include $(call all-makefiles-under,$(LOCAL_PATH))
diff --git a/db845c/firmware/K2026090.mem b/db845c/firmware/K2026090.mem
new file mode 100644
index 0000000..47424d4
--- /dev/null
+++ b/db845c/firmware/K2026090.mem
Binary files differ
diff --git a/db845c/firmware/LICENSE.qcom.txt b/db845c/firmware/LICENSE.qcom.txt
new file mode 100644
index 0000000..c880572
--- /dev/null
+++ b/db845c/firmware/LICENSE.qcom.txt
@@ -0,0 +1,206 @@
+PLEASE READ THIS LICENSE AGREEMENT ("AGREEMENT") CAREFULLY.  THIS AGREEMENT IS
+A BINDING LEGAL AGREEMENT ENTERED INTO BY AND BETWEEN YOU (OR IF YOU ARE
+ENTERING INTO THIS AGREEMENT ON BEHALF OF AN ENTITY, THEN THE ENTITY THAT YOU
+REPRESENT) AND QUALCOMM TECHNOLOGIES, INC. ("QTI" "WE" "OUR" OR "US").  THIS IS
+THE AGREEMENT THAT APPLIES TO YOUR USE OF THE DESIGNATED AND/OR LINKED
+APPLICATIONS, THE ENCLOSED QUALCOMM TECHNOLOGIES' MATERIALS, INCLUDING RELATED
+DOCUMENTATION AND ANY UPDATES OR IMPROVEMENTS THEREOF
+(COLLECTIVELY, "MATERIALS").  BY USING OR COMPLETING THE INSTALLATION OF THE
+MATERIALS, YOU ARE ACCEPTING THIS AGREEMENT AND YOU AGREE TO BE BOUND BY ITS
+TERMS AND CONDITIONS.  IF YOU DO NOT AGREE TO THESE TERMS, QTI IS UNWILLING TO
+AND DOES NOT LICENSE THE MATERIALS TO YOU. IF YOU DO NOT AGREE TO THESE TERMS
+YOU MUST DISCONTINUE THE INSTALLATION PROCESS AND YOU MAY NOT USE THE MATERIALS
+OR RETAIN ANY COPIES OF THE MATERIALS. ANY USE OR POSSESSION OF THE MATERIALS
+BY YOU IS SUBJECT TO THE TERMS AND CONDITIONS SET FORTH IN THIS AGREEMENT.
+
+1. RIGHT TO USE DELIVERABLES; RESTRICTIONS.
+
+  1.1 License.  Subject to the terms and conditions of this Agreement,
+  including, without limitation, the restrictions, conditions, limitations and
+  exclusions set forth in this Agreement, QTI hereby grants to you a
+  nonexclusive, limited license under QTI's copyrights to:  (i) install and use
+  the Materials; and (ii) to reproduce and redistribute the binary code portions
+  of the Materials (the "Redistributable Binary Code").  You may make and use a
+  reasonable number of copies of any documentation.
+
+  1.2 Redistribution Restrictions.  Distribution of the Redistributable Binary
+  Code is subject to the following restrictions: (i) Redistributable Binary Code
+  may only be distributed in binary format and may not be distributed in source
+  code format:; (ii)  the Redistributable Binary Code may only operate in
+  conjunction with platforms incorporating Qualcomm Technologies, Inc. chipsets;
+  (iii) redistribution of the Redistributable Binary Code must include the .txt
+  file setting forth the terms and condition of this Agreement; (iv) you may not
+  use Qualcomm Technologies' or its affiliates or subsidiaries name, logo or
+  trademarks; and (v) copyright, trademark, patent and any other notices that
+  appear on the Materials may not be removed or obscured.
+
+  1.3 Additional Restrictions.  Except as expressly permitted by this Agreement,
+  you shall have no right to sublicense, transfer or otherwise disclose the
+  Materials to any third party.  You shall not reverse engineer, reverse
+  assemble, reverse translate, decompile or reduce to source code form any
+  portion of the Materials provided in object code form or executable form.
+  Except for the purposes expressly permitted in this Agreement, You shall not
+  use the Materials for any other purpose.  QTI (or its licensors) shall retain
+  title and all ownership rights in and to the Materials and any alterations,
+  modifications (including all derivative works), translations or adaptations
+  made of the Materials, and all copies thereof, and nothing herein shall be
+  deemed to grant any right to You under any of QTI's or its affiliates'
+  patents.  You shall not subject the Materials to any third party license
+  terms (e.g., open source license terms).  You shall not use the Materials for
+  the purpose of identifying or providing evidence to support any potential
+  patent infringement claim against QTI, its affiliates, or any of QTI's or
+  QTI's affiliates' suppliers and/or direct or indirect customers.  QTI hereby
+  reserves all rights not expressly granted herein.
+
+  1.4 Third Party Software and Materials.  The Software may contain or link to
+  certain software and/or materials that are written or owned by third parties.
+  Such third party code and materials may be licensed under separate or
+  different terms and conditions and are not licensed to you under the terms of
+  this Agreement.  You agree to comply with all terms and conditions imposed on
+  you in the applicable third party licenses.  Such terms and conditions may
+  impose certain obligations on you as a condition to the permitted use of such
+  third party code and materials.  QTI does not represent or warrant that such
+  third party licensors have or will continue to license or make available their
+  code and materials to you.
+
+  1.5 Feedback.  QTI may from time to time receive suggestions, feedback or
+  other information from You regarding the Materials.  Any suggestions, feedback
+  or other disclosures received from You are and shall be entirely voluntary on
+  the part of You.  Notwithstanding any other term in this Agreement, QTI shall
+  be free to use suggestions, feedback or other information received from You,
+  without obligation of any kind to You.  The Parties agree that all inventions,
+  product improvements, and modifications conceived of or made by QTI that are
+  based, either in whole or in part, on ideas, feedback, suggestions, or
+  recommended improvements received from You are the exclusive property of QTI,
+  and all right, title and interest in and to any such inventions, product
+  improvements, and modifications will vest solely in QTI.
+
+  1.6 No Technical Support.  QTI is under no obligation to provide any form of
+  technical support for the Materials, and if QTI, in its sole discretion,
+  chooses to provide any form of support or information relating to the
+  Materials, such support and information shall be deemed confidential and
+  proprietary to QTI.
+
+2. WARRANTY DISCLAIMER.  YOU EXPRESSLY ACKNOWLEDGE AND AGREE THAT THE USE OF
+THE MATERIALS IS AT YOUR SOLE RISK.  THE MATERIALS AND TECHNICAL SUPPORT, IF
+ANY, ARE PROVIDED "AS IS" AND WITHOUT WARRANTY OF ANY KIND, WHETHER EXPRESS OR
+IMPLIED.  QTI ITS LICENSORS AND AFFILIATES MAKE NO WARRANTIES, EXPRESS OR
+IMPLIED, WITH RESPECT TO THE MATERIALS OR ANY OTHER INFORMATION OR DOCUMENTATION
+PROVIDED UNDER THIS AGREEMENT, INCLUDING BUT NOT LIMITED TO ANY WARRANTY OF
+MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR AGAINST INFRINGEMENT, OR
+ANY EXPRESS OR IMPLIED WARRANTY ARISING OUT OF TRADE USAGE OR OUT OF A COURSE OF
+DEALING OR COURSE OF PERFORMANCE.  NOTHING CONTAINED IN THIS AGREEMENT SHALL BE
+CONSTRUED AS (I) A WARRANTY OR REPRESENTATION BY QTI, ITS LICENSORS OR
+AFFILIATES AS TO THE VALIDITY OR SCOPE OF ANY PATENT, COPYRIGHT OR OTHER
+INTELLECTUAL PROPERTY RIGHT OR (II) A WARRANTY OR REPRESENTATION BY QTI THAT ANY
+MANUFACTURE OR USE WILL BE FREE FROM INFRINGEMENT OF PATENTS, COPYRIGHTS OR
+OTHER INTELLECTUAL PROPERTY RIGHTS OF OTHERS, AND IT SHALL BE THE SOLE
+RESPONSIBILITY OF YOU TO MAKE SUCH DETERMINATION AS IS NECESSARY WITH RESPECT TO
+THE ACQUISITION OF LICENSES UNDER PATENTS AND OTHER INTELLECTUAL PROPERTY OF
+THIRD PARTIES.
+
+3. NO OTHER LICENSES OR INTELLECTUAL PROPERTY RIGHTS. Neither this Agreement,
+nor any act by QTI or any of its affiliates pursuant to this Agreement or
+relating to the Materials (including, without limitation, the provision by QTI
+or its affiliates of the Materials), shall provide to You any license or any
+other rights whatsoever under any patents, trademarks, trade secrets, copyrights
+or any other intellectual property of QTI or any of its affiliates, except for
+the copyright rights expressly licensed under this Agreement. You understand and
+agree that:
+
+  (i) Neither this Agreement, nor delivery of the Materials, grants any right to
+  practice, or any other right at all with respect to, any patent of QTI or any
+  of its affiliates; and
+
+  (ii) A separate license agreement from QUALCOMM Incorporated is needed to use
+  or practice any patent of QUALCOMM Incorporated. You agree not to contend in
+  any context that, as a result of the provision or use of the Materials, either
+  QTI or any of its affiliates has any obligation to extend, or You or any other
+  party has obtained any right to, any license, whether express or implied, with
+  respect to any patent of QTI or any of its affiliates for any purpose.
+
+4. TERMINATION.  This Agreement shall be effective upon acceptance, or access or
+use of the Materials (whichever occurs first) by You and shall continue until
+terminated. You may terminate the Agreement at any time by deleting and
+destroying all copies of the Materials and all related information in Your
+possession or control. This Agreement terminates immediately and automatically,
+with or without notice, if You fail to comply with any provision hereof.
+Additionally, QTI may at any time terminate this Agreement, without cause, upon
+notice to You. Upon termination You must, to the extent possible, delete or
+destroy all copies of the Materials in Your possession and the license granted
+to You in this Agreement shall terminate. Sections 1.2 through 10 shall survive
+the termination of this Agreement. In the event that any restrictions,
+conditions, limitations are found to be either invalid or unenforceable, the
+rights granted to You in Section 1 (License) shall be null, void and ineffective
+from the Effective Date, and QTI shall also have the right to terminate this
+Agreement immediately, and with retroactive effect to the effective date.
+
+5. LIMITATION OF LIABILITY.  IN NO EVENT SHALL QTI, QTI's AFFILIATES OR ITS
+LICENSORS BE LIABLE TO YOU FOR ANY INCIDENTAL, CONSEQUENTIAL OR SPECIAL DAMAGES,
+INCLUDING BUT NOT LIMITED TO ANY LOST PROFITS, LOST SAVINGS, OR OTHER INCIDENTAL
+DAMAGES, ARISING OUT OF THE USE OR INABILITY TO USE, OR THE DELIVERY OR FAILURE
+TO DELIVER, ANY OF THE DELIVERABLES, OR ANY BREACH OF ANY OBLIGATION UNDER THIS
+AGREEMENT, EVEN IF QTI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+THE FOREGOING LIMITATION OF LIABILITY SHALL REMAIN IN FULL FORCE AND EFFECT
+REGARDLESS OF WHETHER YOUR REMEDIES HEREUNDER ARE DETERMINED TO HAVE FAILED OF
+THEIR ESSENTIAL PURPOSE.  THE ENTIRE LIABILITY OF QTI, QTI's AFFILIATES AND ITS
+LICENSORS, AND THE SOLE AND EXCLUSIVE REMEDY OF YOU, FOR ANY CLAIM OR CAUSE OF
+ACTION ARISING HEREUNDER (WHETHER IN CONTRACT, TORT, OR OTHERWISE) SHALL NOT
+EXCEED US$50.
+
+6. INDEMNIFICATION.  You agree to indemnify and hold harmless QTI and its
+officers, directors, employees and successors and assigns against any and all
+third party claims, demands, causes of action, losses, liabilities, damages,
+costs and expenses, incurred by QTI (including but not limited to costs of
+defense, investigation and reasonable attorney's fees) arising out of, resulting
+from or related to: (i) any breach of this Agreement by You; and (ii) your acts,
+omissions, products and services.  If requested by QTI, You agree to defend QTI
+in connection with any third party claims, demands, or causes of action
+resulting from, arising out of or in connection with any of the foregoing.
+
+7. ASSIGNMENT.  You shall not assign this Agreement or any right or interest
+under this Agreement, nor delegate any obligation to be performed under this
+Agreement, without QTI's prior written consent.  For purposes of this Section 7,
+an "assignment" by You under this Section shall be deemed to include, without
+limitation, any merger, consolidation, sale of all or substantially all of its
+assets, or any substantial change in the management or control of You.
+Any attempted assignment in contravention of this Section 9 shall be void.
+QTI may freely assign this Agreement or delegate any or all of its rights and
+obligations hereunder to any third party.
+
+8. COMPLIANCE WITH LAWS; APPLICABLE LAW.  You agree to comply with all
+applicable local, international and national laws and regulations and with U.S.
+Export Administration Regulations, as they apply to the subject matter of this
+Agreement.  This Agreement is governed by the laws of the State of California,
+excluding California's choice of law rules.
+
+9. CONTRACTING PARTIES.  If the Materials are downloaded on any computer owned
+by a corporation or other legal entity, then this Agreement is formed by and
+between QTI and such entity.  The individual accepting the terms of this
+Agreement represents and warrants to QTI that they have the authority to bind
+such entity to the terms and conditions of this Agreement.
+
+10. MISCELLANEOUS PROVISIONS.  This Agreement, together with all exhibits
+attached hereto, which are incorporated herein by this reference, constitutes
+the entire agreement between QTI and You and supersedes all prior negotiations,
+representations and agreements between the parties with respect to the subject
+matter hereof.  No addition or modification of this Agreement shall be effective
+unless made in writing and signed by the respective representatives of QTI and
+You.  The restrictions, limitations, exclusions and conditions set forth in this
+Agreement shall apply even if QTI or any of its affiliates becomes aware of or
+fails to act in a manner to address any violation or failure to comply
+therewith.  You hereby acknowledge and agree that the restrictions, limitations,
+conditions and exclusions imposed in this Agreement on the rights granted in
+this Agreement are not a derogation of the benefits of such rights.  You further
+acknowledges that, in the absence of such restrictions, limitations, conditions
+and exclusions, QTI would not have entered into this Agreement with You.  Each
+party shall be responsible for and shall bear its own expenses in connection
+with this Agreement.  If any of the provisions of this Agreement are determined
+to be invalid, illegal, or otherwise unenforceable, the remaining provisions
+shall remain in full force and effect.  This Agreement is entered into solely
+in the English language, and if for any reason any other language version is
+prepared by any party, it shall be solely for convenience and the English
+version shall govern and control all aspects.  If You are located in the
+province of Quebec, Canada, the following applies: The Parties hereby confirm
+they have requested this Agreement and all related documents be prepared
+in English..
\ No newline at end of file
diff --git a/db845c/firmware/NOTICE b/db845c/firmware/NOTICE
new file mode 100644
index 0000000..c880572
--- /dev/null
+++ b/db845c/firmware/NOTICE
@@ -0,0 +1,206 @@
+PLEASE READ THIS LICENSE AGREEMENT ("AGREEMENT") CAREFULLY.  THIS AGREEMENT IS
+A BINDING LEGAL AGREEMENT ENTERED INTO BY AND BETWEEN YOU (OR IF YOU ARE
+ENTERING INTO THIS AGREEMENT ON BEHALF OF AN ENTITY, THEN THE ENTITY THAT YOU
+REPRESENT) AND QUALCOMM TECHNOLOGIES, INC. ("QTI" "WE" "OUR" OR "US").  THIS IS
+THE AGREEMENT THAT APPLIES TO YOUR USE OF THE DESIGNATED AND/OR LINKED
+APPLICATIONS, THE ENCLOSED QUALCOMM TECHNOLOGIES' MATERIALS, INCLUDING RELATED
+DOCUMENTATION AND ANY UPDATES OR IMPROVEMENTS THEREOF
+(COLLECTIVELY, "MATERIALS").  BY USING OR COMPLETING THE INSTALLATION OF THE
+MATERIALS, YOU ARE ACCEPTING THIS AGREEMENT AND YOU AGREE TO BE BOUND BY ITS
+TERMS AND CONDITIONS.  IF YOU DO NOT AGREE TO THESE TERMS, QTI IS UNWILLING TO
+AND DOES NOT LICENSE THE MATERIALS TO YOU. IF YOU DO NOT AGREE TO THESE TERMS
+YOU MUST DISCONTINUE THE INSTALLATION PROCESS AND YOU MAY NOT USE THE MATERIALS
+OR RETAIN ANY COPIES OF THE MATERIALS. ANY USE OR POSSESSION OF THE MATERIALS
+BY YOU IS SUBJECT TO THE TERMS AND CONDITIONS SET FORTH IN THIS AGREEMENT.
+
+1. RIGHT TO USE DELIVERABLES; RESTRICTIONS.
+
+  1.1 License.  Subject to the terms and conditions of this Agreement,
+  including, without limitation, the restrictions, conditions, limitations and
+  exclusions set forth in this Agreement, QTI hereby grants to you a
+  nonexclusive, limited license under QTI's copyrights to:  (i) install and use
+  the Materials; and (ii) to reproduce and redistribute the binary code portions
+  of the Materials (the "Redistributable Binary Code").  You may make and use a
+  reasonable number of copies of any documentation.
+
+  1.2 Redistribution Restrictions.  Distribution of the Redistributable Binary
+  Code is subject to the following restrictions: (i) Redistributable Binary Code
+  may only be distributed in binary format and may not be distributed in source
+  code format:; (ii)  the Redistributable Binary Code may only operate in
+  conjunction with platforms incorporating Qualcomm Technologies, Inc. chipsets;
+  (iii) redistribution of the Redistributable Binary Code must include the .txt
+  file setting forth the terms and condition of this Agreement; (iv) you may not
+  use Qualcomm Technologies' or its affiliates or subsidiaries name, logo or
+  trademarks; and (v) copyright, trademark, patent and any other notices that
+  appear on the Materials may not be removed or obscured.
+
+  1.3 Additional Restrictions.  Except as expressly permitted by this Agreement,
+  you shall have no right to sublicense, transfer or otherwise disclose the
+  Materials to any third party.  You shall not reverse engineer, reverse
+  assemble, reverse translate, decompile or reduce to source code form any
+  portion of the Materials provided in object code form or executable form.
+  Except for the purposes expressly permitted in this Agreement, You shall not
+  use the Materials for any other purpose.  QTI (or its licensors) shall retain
+  title and all ownership rights in and to the Materials and any alterations,
+  modifications (including all derivative works), translations or adaptations
+  made of the Materials, and all copies thereof, and nothing herein shall be
+  deemed to grant any right to You under any of QTI's or its affiliates'
+  patents.  You shall not subject the Materials to any third party license
+  terms (e.g., open source license terms).  You shall not use the Materials for
+  the purpose of identifying or providing evidence to support any potential
+  patent infringement claim against QTI, its affiliates, or any of QTI's or
+  QTI's affiliates' suppliers and/or direct or indirect customers.  QTI hereby
+  reserves all rights not expressly granted herein.
+
+  1.4 Third Party Software and Materials.  The Software may contain or link to
+  certain software and/or materials that are written or owned by third parties.
+  Such third party code and materials may be licensed under separate or
+  different terms and conditions and are not licensed to you under the terms of
+  this Agreement.  You agree to comply with all terms and conditions imposed on
+  you in the applicable third party licenses.  Such terms and conditions may
+  impose certain obligations on you as a condition to the permitted use of such
+  third party code and materials.  QTI does not represent or warrant that such
+  third party licensors have or will continue to license or make available their
+  code and materials to you.
+
+  1.5 Feedback.  QTI may from time to time receive suggestions, feedback or
+  other information from You regarding the Materials.  Any suggestions, feedback
+  or other disclosures received from You are and shall be entirely voluntary on
+  the part of You.  Notwithstanding any other term in this Agreement, QTI shall
+  be free to use suggestions, feedback or other information received from You,
+  without obligation of any kind to You.  The Parties agree that all inventions,
+  product improvements, and modifications conceived of or made by QTI that are
+  based, either in whole or in part, on ideas, feedback, suggestions, or
+  recommended improvements received from You are the exclusive property of QTI,
+  and all right, title and interest in and to any such inventions, product
+  improvements, and modifications will vest solely in QTI.
+
+  1.6 No Technical Support.  QTI is under no obligation to provide any form of
+  technical support for the Materials, and if QTI, in its sole discretion,
+  chooses to provide any form of support or information relating to the
+  Materials, such support and information shall be deemed confidential and
+  proprietary to QTI.
+
+2. WARRANTY DISCLAIMER.  YOU EXPRESSLY ACKNOWLEDGE AND AGREE THAT THE USE OF
+THE MATERIALS IS AT YOUR SOLE RISK.  THE MATERIALS AND TECHNICAL SUPPORT, IF
+ANY, ARE PROVIDED "AS IS" AND WITHOUT WARRANTY OF ANY KIND, WHETHER EXPRESS OR
+IMPLIED.  QTI ITS LICENSORS AND AFFILIATES MAKE NO WARRANTIES, EXPRESS OR
+IMPLIED, WITH RESPECT TO THE MATERIALS OR ANY OTHER INFORMATION OR DOCUMENTATION
+PROVIDED UNDER THIS AGREEMENT, INCLUDING BUT NOT LIMITED TO ANY WARRANTY OF
+MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR AGAINST INFRINGEMENT, OR
+ANY EXPRESS OR IMPLIED WARRANTY ARISING OUT OF TRADE USAGE OR OUT OF A COURSE OF
+DEALING OR COURSE OF PERFORMANCE.  NOTHING CONTAINED IN THIS AGREEMENT SHALL BE
+CONSTRUED AS (I) A WARRANTY OR REPRESENTATION BY QTI, ITS LICENSORS OR
+AFFILIATES AS TO THE VALIDITY OR SCOPE OF ANY PATENT, COPYRIGHT OR OTHER
+INTELLECTUAL PROPERTY RIGHT OR (II) A WARRANTY OR REPRESENTATION BY QTI THAT ANY
+MANUFACTURE OR USE WILL BE FREE FROM INFRINGEMENT OF PATENTS, COPYRIGHTS OR
+OTHER INTELLECTUAL PROPERTY RIGHTS OF OTHERS, AND IT SHALL BE THE SOLE
+RESPONSIBILITY OF YOU TO MAKE SUCH DETERMINATION AS IS NECESSARY WITH RESPECT TO
+THE ACQUISITION OF LICENSES UNDER PATENTS AND OTHER INTELLECTUAL PROPERTY OF
+THIRD PARTIES.
+
+3. NO OTHER LICENSES OR INTELLECTUAL PROPERTY RIGHTS. Neither this Agreement,
+nor any act by QTI or any of its affiliates pursuant to this Agreement or
+relating to the Materials (including, without limitation, the provision by QTI
+or its affiliates of the Materials), shall provide to You any license or any
+other rights whatsoever under any patents, trademarks, trade secrets, copyrights
+or any other intellectual property of QTI or any of its affiliates, except for
+the copyright rights expressly licensed under this Agreement. You understand and
+agree that:
+
+  (i) Neither this Agreement, nor delivery of the Materials, grants any right to
+  practice, or any other right at all with respect to, any patent of QTI or any
+  of its affiliates; and
+
+  (ii) A separate license agreement from QUALCOMM Incorporated is needed to use
+  or practice any patent of QUALCOMM Incorporated. You agree not to contend in
+  any context that, as a result of the provision or use of the Materials, either
+  QTI or any of its affiliates has any obligation to extend, or You or any other
+  party has obtained any right to, any license, whether express or implied, with
+  respect to any patent of QTI or any of its affiliates for any purpose.
+
+4. TERMINATION.  This Agreement shall be effective upon acceptance, or access or
+use of the Materials (whichever occurs first) by You and shall continue until
+terminated. You may terminate the Agreement at any time by deleting and
+destroying all copies of the Materials and all related information in Your
+possession or control. This Agreement terminates immediately and automatically,
+with or without notice, if You fail to comply with any provision hereof.
+Additionally, QTI may at any time terminate this Agreement, without cause, upon
+notice to You. Upon termination You must, to the extent possible, delete or
+destroy all copies of the Materials in Your possession and the license granted
+to You in this Agreement shall terminate. Sections 1.2 through 10 shall survive
+the termination of this Agreement. In the event that any restrictions,
+conditions, limitations are found to be either invalid or unenforceable, the
+rights granted to You in Section 1 (License) shall be null, void and ineffective
+from the Effective Date, and QTI shall also have the right to terminate this
+Agreement immediately, and with retroactive effect to the effective date.
+
+5. LIMITATION OF LIABILITY.  IN NO EVENT SHALL QTI, QTI's AFFILIATES OR ITS
+LICENSORS BE LIABLE TO YOU FOR ANY INCIDENTAL, CONSEQUENTIAL OR SPECIAL DAMAGES,
+INCLUDING BUT NOT LIMITED TO ANY LOST PROFITS, LOST SAVINGS, OR OTHER INCIDENTAL
+DAMAGES, ARISING OUT OF THE USE OR INABILITY TO USE, OR THE DELIVERY OR FAILURE
+TO DELIVER, ANY OF THE DELIVERABLES, OR ANY BREACH OF ANY OBLIGATION UNDER THIS
+AGREEMENT, EVEN IF QTI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+THE FOREGOING LIMITATION OF LIABILITY SHALL REMAIN IN FULL FORCE AND EFFECT
+REGARDLESS OF WHETHER YOUR REMEDIES HEREUNDER ARE DETERMINED TO HAVE FAILED OF
+THEIR ESSENTIAL PURPOSE.  THE ENTIRE LIABILITY OF QTI, QTI's AFFILIATES AND ITS
+LICENSORS, AND THE SOLE AND EXCLUSIVE REMEDY OF YOU, FOR ANY CLAIM OR CAUSE OF
+ACTION ARISING HEREUNDER (WHETHER IN CONTRACT, TORT, OR OTHERWISE) SHALL NOT
+EXCEED US$50.
+
+6. INDEMNIFICATION.  You agree to indemnify and hold harmless QTI and its
+officers, directors, employees and successors and assigns against any and all
+third party claims, demands, causes of action, losses, liabilities, damages,
+costs and expenses, incurred by QTI (including but not limited to costs of
+defense, investigation and reasonable attorney's fees) arising out of, resulting
+from or related to: (i) any breach of this Agreement by You; and (ii) your acts,
+omissions, products and services.  If requested by QTI, You agree to defend QTI
+in connection with any third party claims, demands, or causes of action
+resulting from, arising out of or in connection with any of the foregoing.
+
+7. ASSIGNMENT.  You shall not assign this Agreement or any right or interest
+under this Agreement, nor delegate any obligation to be performed under this
+Agreement, without QTI's prior written consent.  For purposes of this Section 7,
+an "assignment" by You under this Section shall be deemed to include, without
+limitation, any merger, consolidation, sale of all or substantially all of its
+assets, or any substantial change in the management or control of You.
+Any attempted assignment in contravention of this Section 9 shall be void.
+QTI may freely assign this Agreement or delegate any or all of its rights and
+obligations hereunder to any third party.
+
+8. COMPLIANCE WITH LAWS; APPLICABLE LAW.  You agree to comply with all
+applicable local, international and national laws and regulations and with U.S.
+Export Administration Regulations, as they apply to the subject matter of this
+Agreement.  This Agreement is governed by the laws of the State of California,
+excluding California's choice of law rules.
+
+9. CONTRACTING PARTIES.  If the Materials are downloaded on any computer owned
+by a corporation or other legal entity, then this Agreement is formed by and
+between QTI and such entity.  The individual accepting the terms of this
+Agreement represents and warrants to QTI that they have the authority to bind
+such entity to the terms and conditions of this Agreement.
+
+10. MISCELLANEOUS PROVISIONS.  This Agreement, together with all exhibits
+attached hereto, which are incorporated herein by this reference, constitutes
+the entire agreement between QTI and You and supersedes all prior negotiations,
+representations and agreements between the parties with respect to the subject
+matter hereof.  No addition or modification of this Agreement shall be effective
+unless made in writing and signed by the respective representatives of QTI and
+You.  The restrictions, limitations, exclusions and conditions set forth in this
+Agreement shall apply even if QTI or any of its affiliates becomes aware of or
+fails to act in a manner to address any violation or failure to comply
+therewith.  You hereby acknowledge and agree that the restrictions, limitations,
+conditions and exclusions imposed in this Agreement on the rights granted in
+this Agreement are not a derogation of the benefits of such rights.  You further
+acknowledges that, in the absence of such restrictions, limitations, conditions
+and exclusions, QTI would not have entered into this Agreement with You.  Each
+party shall be responsible for and shall bear its own expenses in connection
+with this Agreement.  If any of the provisions of this Agreement are determined
+to be invalid, illegal, or otherwise unenforceable, the remaining provisions
+shall remain in full force and effect.  This Agreement is entered into solely
+in the English language, and if for any reason any other language version is
+prepared by any party, it shall be solely for convenience and the English
+version shall govern and control all aspects.  If You are located in the
+province of Quebec, Canada, the following applies: The Parties hereby confirm
+they have requested this Agreement and all related documents be prepared
+in English..
\ No newline at end of file
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+standAloneReserve 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+nvDpdPefConfigId__0_0 6 
+nvDpdPefConfigLen__0_0 636 
+nvDpdPefConfigFlag__0_0 0x0 
+pefMask__0_0 0x0 
+pefFlag__0_0 0x0 
+pefCalMax__0_0 0 
+pefCalMin__0_0 0 
+pefCalStep__0_0 0 
+pefMaxCalAtt__0_0 0 
+pefMaxCalBw__0_0 0 
+pefMagSel__0_0 0 
+pefLbSel__0_0 0 
+bwCntl__0_0 0 
+paprdBwTableDpdOff_B0_0_0 0x0 
+paprdBwTableDpdOff_B1_0_0 0x0 
+paprdBwTable_B0_0_0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 
+paprdBwTable_B1_0_0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 
+PefCoefI__0_0 0 0 0 0 0 0 0 0 0 
+PefCoefQ__0_0 0 0 0 0 0 0 0 0 0 
+PefCoefI_HT40__0_0 0 0 0 0 0 0 0 0 0 
+PefCoefQ_HT40__0_0 0 0 0 0 0 0 0 0 0 
+PefCoefI__0_0 0 0 0 0 0 0 0 0 0 
+PefCoefQ__0_0 0 0 0 0 0 0 0 0 0 
+PefCoefI_HT40__0_0 0 0 0 0 0 0 0 0 0 
+PefCoefQ_HT40__0_0 0 0 0 0 0 0 0 0 0 
+PefCoefI_VHT80__0_0 0 0 0 0 0 0 0 0 0 
+PefCoefQ_VHT80__0_0 0 0 0 0 0 0 0 0 0 
+PefCoefI_VHT160__0_0 0 0 0 0 0 0 0 0 0 
+PefCoefQ_VHT160__0_0 0 0 0 0 0 0 0 0 0 
+PREEMP_CNTL__0_0 0x0 
+PEFTBL_SEL_B0_0_0 0x0 
+PEFTBL_SEL_B1_0_0 0x0 
+dpdPefConfigFuture 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+nvDpdConfigId__0_0 7 
+nvDpdConfigLen__0_0 280 
+nvDpdConfigFlag__0_0 0x0 
+dpdNarrowBandTraining__0_0 0 
+dpdDebugMode__0_0 0 
+dpdSqLimit__0_0 120 
+dpdSqBestLimit__0_0 20 
+dpdTrainingBW__0_0 0 
+dpdAgc2Settling__0_0 40 
+dpdXpaOn__0_0 0 
+dpdFlag__0_0 0x0 
+dpdReserved__0_0 0 0 0 0 
+dpdAm2AmMask__0_0 0x3fffffff 
+dpdAm2PmMask__0_0 0x3fffffff 
+dpdHt40Mask__0_0 0x3fffffff 
+dpdVht80Mask__0_0 0x3fffffff 
+dpdVht160Mask__0_0 0x0 
+dpdEnable_G_0_0 1 
+dpdNoiseRatio_G_0_0 25 15 
+dpdTargetPwrMax_G_0_0 63 
+dpdTargetPwrMin_G_0_0 0 
+dpdDacGain_G_0_0 8 8 8 8 
+dpdAgc2Power_G_0_0 -12 
+pad_G_0_0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 
+dpdEnable_A_0_0 0 
+dpdNoiseRatio_A_0_0 15 15 
+dpdTargetPwrMax_A_0_0 63 
+dpdTargetPwrMin_A_0_0 0 
+dpdDacGain_A_0_0 -8 0 0 0 
+dpdAgc2Power_A_0_0 -14 
+pad_A_0_0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 
+dpdNbFreq0__0_0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+dpdNbFreq1__0_0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+dpdOffPerChainChannelList_B0_0_0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+dpdOffPerChainChannelList_B1_0_0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+dpdConfigFuture 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+nvTpcDataId__0_0 8 
+nvTpcDataLen__0_0 4932 
+nvTpcDataFlag__0_0 0x0 
+calFreqPier2G_G_0_0 112 137 162 255 255 255 255 255 255 255 255 255 255 255 
+alignPad1_1 0 0 
+paSet_txgainIdx_B0_G_0_0 pasetting:0x0 txgainIdx:0xa 
+meas_pwr_B0_G_0_0 149 
+paSet_txgainIdx_B0_G_0_1 pasetting:0x0 txgainIdx:0x9 
+meas_pwr_B0_G_0_1 135 
+paSet_txgainIdx_B0_G_0_2 pasetting:0x0 txgainIdx:0x8 
+meas_pwr_B0_G_0_2 120 
+paSet_txgainIdx_B0_G_0_3 pasetting:0x0 txgainIdx:0x7 
+meas_pwr_B0_G_0_3 107 
+paSet_txgainIdx_B0_G_0_4 pasetting:0x0 txgainIdx:0x5 
+meas_pwr_B0_G_0_4 76 
+paSet_txgainIdx_B0_G_0_5 pasetting:0x0 txgainIdx:0x4 
+meas_pwr_B0_G_0_5 61 
+paSet_txgainIdx_B0_G_0_6 pasetting:0x0 txgainIdx:0x1 
+meas_pwr_B0_G_0_6 4 
+paSet_txgainIdx_B0_G_0_7 pasetting:0x0 txgainIdx:0x1 
+meas_pwr_B0_G_0_7 4 
+paSet_txgainIdx_B1_G_0_0 pasetting:0x0 txgainIdx:0xa 
+meas_pwr_B1_G_0_0 147 
+paSet_txgainIdx_B1_G_0_1 pasetting:0x0 txgainIdx:0x9 
+meas_pwr_B1_G_0_1 133 
+paSet_txgainIdx_B1_G_0_2 pasetting:0x0 txgainIdx:0x8 
+meas_pwr_B1_G_0_2 117 
+paSet_txgainIdx_B1_G_0_3 pasetting:0x0 txgainIdx:0x7 
+meas_pwr_B1_G_0_3 102 
+paSet_txgainIdx_B1_G_0_4 pasetting:0x0 txgainIdx:0x6 
+meas_pwr_B1_G_0_4 83 
+paSet_txgainIdx_B1_G_0_5 pasetting:0x0 txgainIdx:0x4 
+meas_pwr_B1_G_0_5 55 
+paSet_txgainIdx_B1_G_0_6 pasetting:0x0 txgainIdx:0x1 
+meas_pwr_B1_G_0_6 1 
+paSet_txgainIdx_B1_G_0_7 pasetting:0x0 txgainIdx:0x1 
+meas_pwr_B1_G_0_7 1 
+dacGain_G_0_0 -8 -8 
+thermCalVal_G_0_0 123 123 
+voltCalVal_G_0_0 0 
+calOlpc2GReserved 0 0 0 
+paSet_txgainIdx_B0_G_1_0 pasetting:0x0 txgainIdx:0xa 
+meas_pwr_B0_G_1_0 151 
+paSet_txgainIdx_B0_G_1_1 pasetting:0x0 txgainIdx:0x9 
+meas_pwr_B0_G_1_1 138 
+paSet_txgainIdx_B0_G_1_2 pasetting:0x0 txgainIdx:0x8 
+meas_pwr_B0_G_1_2 122 
+paSet_txgainIdx_B0_G_1_3 pasetting:0x0 txgainIdx:0x7 
+meas_pwr_B0_G_1_3 109 
+paSet_txgainIdx_B0_G_1_4 pasetting:0x0 txgainIdx:0x5 
+meas_pwr_B0_G_1_4 77 
+paSet_txgainIdx_B0_G_1_5 pasetting:0x0 txgainIdx:0x4 
+meas_pwr_B0_G_1_5 62 
+paSet_txgainIdx_B0_G_1_6 pasetting:0x0 txgainIdx:0x1 
+meas_pwr_B0_G_1_6 5 
+paSet_txgainIdx_B0_G_1_7 pasetting:0x0 txgainIdx:0x1 
+meas_pwr_B0_G_1_7 5 
+paSet_txgainIdx_B1_G_1_0 pasetting:0x0 txgainIdx:0xa 
+meas_pwr_B1_G_1_0 147 
+paSet_txgainIdx_B1_G_1_1 pasetting:0x0 txgainIdx:0x9 
+meas_pwr_B1_G_1_1 133 
+paSet_txgainIdx_B1_G_1_2 pasetting:0x0 txgainIdx:0x8 
+meas_pwr_B1_G_1_2 119 
+paSet_txgainIdx_B1_G_1_3 pasetting:0x0 txgainIdx:0x7 
+meas_pwr_B1_G_1_3 105 
+paSet_txgainIdx_B1_G_1_4 pasetting:0x0 txgainIdx:0x5 
+meas_pwr_B1_G_1_4 74 
+paSet_txgainIdx_B1_G_1_5 pasetting:0x0 txgainIdx:0x4 
+meas_pwr_B1_G_1_5 58 
+paSet_txgainIdx_B1_G_1_6 pasetting:0x0 txgainIdx:0x1 
+meas_pwr_B1_G_1_6 5 
+paSet_txgainIdx_B1_G_1_7 pasetting:0x0 txgainIdx:0x1 
+meas_pwr_B1_G_1_7 5 
+dacGain_G_1_0 -8 -8 
+thermCalVal_G_1_0 123 123 
+voltCalVal_G_1_0 0 
+calOlpc2GReserved 0 0 0 
+paSet_txgainIdx_B0_G_2_0 pasetting:0x0 txgainIdx:0xa 
+meas_pwr_B0_G_2_0 145 
+paSet_txgainIdx_B0_G_2_1 pasetting:0x0 txgainIdx:0x9 
+meas_pwr_B0_G_2_1 130 
+paSet_txgainIdx_B0_G_2_2 pasetting:0x0 txgainIdx:0x8 
+meas_pwr_B0_G_2_2 114 
+paSet_txgainIdx_B0_G_2_3 pasetting:0x0 txgainIdx:0x7 
+meas_pwr_B0_G_2_3 100 
+paSet_txgainIdx_B0_G_2_4 pasetting:0x0 txgainIdx:0x6 
+meas_pwr_B0_G_2_4 81 
+paSet_txgainIdx_B0_G_2_5 pasetting:0x0 txgainIdx:0x4 
+meas_pwr_B0_G_2_5 52 
+paSet_txgainIdx_B0_G_2_6 pasetting:0x0 txgainIdx:0x2 
+meas_pwr_B0_G_2_6 15 
+paSet_txgainIdx_B0_G_2_7 pasetting:0x0 txgainIdx:0x2 
+meas_pwr_B0_G_2_7 15 
+paSet_txgainIdx_B1_G_2_0 pasetting:0x0 txgainIdx:0xb 
+meas_pwr_B1_G_2_0 152 
+paSet_txgainIdx_B1_G_2_1 pasetting:0x0 txgainIdx:0xa 
+meas_pwr_B1_G_2_1 140 
+paSet_txgainIdx_B1_G_2_2 pasetting:0x0 txgainIdx:0x9 
+meas_pwr_B1_G_2_2 125 
+paSet_txgainIdx_B1_G_2_3 pasetting:0x0 txgainIdx:0x8 
+meas_pwr_B1_G_2_3 109 
+paSet_txgainIdx_B1_G_2_4 pasetting:0x0 txgainIdx:0x6 
+meas_pwr_B1_G_2_4 75 
+paSet_txgainIdx_B1_G_2_5 pasetting:0x0 txgainIdx:0x4 
+meas_pwr_B1_G_2_5 48 
+paSet_txgainIdx_B1_G_2_6 pasetting:0x0 txgainIdx:0x2 
+meas_pwr_B1_G_2_6 12 
+paSet_txgainIdx_B1_G_2_7 pasetting:0x0 txgainIdx:0x2 
+meas_pwr_B1_G_2_7 12 
+dacGain_G_2_0 -8 -8 
+thermCalVal_G_2_0 123 123 
+voltCalVal_G_2_0 0 
+calOlpc2GReserved 0 0 0 
+paSet_txgainIdx_B0_G_3_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_3_0 0 
+paSet_txgainIdx_B0_G_3_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_3_1 0 
+paSet_txgainIdx_B0_G_3_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_3_2 0 
+paSet_txgainIdx_B0_G_3_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_3_3 0 
+paSet_txgainIdx_B0_G_3_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_3_4 0 
+paSet_txgainIdx_B0_G_3_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_3_5 0 
+paSet_txgainIdx_B0_G_3_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_3_6 0 
+paSet_txgainIdx_B0_G_3_7 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_3_7 0 
+paSet_txgainIdx_B1_G_3_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_3_0 0 
+paSet_txgainIdx_B1_G_3_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_3_1 0 
+paSet_txgainIdx_B1_G_3_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_3_2 0 
+paSet_txgainIdx_B1_G_3_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_3_3 0 
+paSet_txgainIdx_B1_G_3_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_3_4 0 
+paSet_txgainIdx_B1_G_3_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_3_5 0 
+paSet_txgainIdx_B1_G_3_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_3_6 0 
+paSet_txgainIdx_B1_G_3_7 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_3_7 0 
+dacGain_G_3_0 0 0 
+thermCalVal_G_3_0 121 121 
+voltCalVal_G_3_0 0 
+calOlpc2GReserved 0 0 0 
+paSet_txgainIdx_B0_G_4_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_4_0 0 
+paSet_txgainIdx_B0_G_4_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_4_1 0 
+paSet_txgainIdx_B0_G_4_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_4_2 0 
+paSet_txgainIdx_B0_G_4_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_4_3 0 
+paSet_txgainIdx_B0_G_4_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_4_4 0 
+paSet_txgainIdx_B0_G_4_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_4_5 0 
+paSet_txgainIdx_B0_G_4_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_4_6 0 
+paSet_txgainIdx_B0_G_4_7 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_4_7 0 
+paSet_txgainIdx_B1_G_4_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_4_0 0 
+paSet_txgainIdx_B1_G_4_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_4_1 0 
+paSet_txgainIdx_B1_G_4_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_4_2 0 
+paSet_txgainIdx_B1_G_4_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_4_3 0 
+paSet_txgainIdx_B1_G_4_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_4_4 0 
+paSet_txgainIdx_B1_G_4_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_4_5 0 
+paSet_txgainIdx_B1_G_4_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_4_6 0 
+paSet_txgainIdx_B1_G_4_7 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_4_7 0 
+dacGain_G_4_0 0 0 
+thermCalVal_G_4_0 121 121 
+voltCalVal_G_4_0 0 
+calOlpc2GReserved 0 0 0 
+paSet_txgainIdx_B0_G_5_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_5_0 0 
+paSet_txgainIdx_B0_G_5_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_5_1 0 
+paSet_txgainIdx_B0_G_5_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_5_2 0 
+paSet_txgainIdx_B0_G_5_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_5_3 0 
+paSet_txgainIdx_B0_G_5_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_5_4 0 
+paSet_txgainIdx_B0_G_5_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_5_5 0 
+paSet_txgainIdx_B0_G_5_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_5_6 0 
+paSet_txgainIdx_B0_G_5_7 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_5_7 0 
+paSet_txgainIdx_B1_G_5_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_5_0 0 
+paSet_txgainIdx_B1_G_5_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_5_1 0 
+paSet_txgainIdx_B1_G_5_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_5_2 0 
+paSet_txgainIdx_B1_G_5_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_5_3 0 
+paSet_txgainIdx_B1_G_5_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_5_4 0 
+paSet_txgainIdx_B1_G_5_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_5_5 0 
+paSet_txgainIdx_B1_G_5_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_5_6 0 
+paSet_txgainIdx_B1_G_5_7 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_5_7 0 
+dacGain_G_5_0 0 0 
+thermCalVal_G_5_0 121 121 
+voltCalVal_G_5_0 0 
+calOlpc2GReserved 0 0 0 
+paSet_txgainIdx_B0_G_6_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_6_0 0 
+paSet_txgainIdx_B0_G_6_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_6_1 0 
+paSet_txgainIdx_B0_G_6_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_6_2 0 
+paSet_txgainIdx_B0_G_6_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_6_3 0 
+paSet_txgainIdx_B0_G_6_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_6_4 0 
+paSet_txgainIdx_B0_G_6_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_6_5 0 
+paSet_txgainIdx_B0_G_6_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_6_6 0 
+paSet_txgainIdx_B0_G_6_7 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_6_7 0 
+paSet_txgainIdx_B1_G_6_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_6_0 0 
+paSet_txgainIdx_B1_G_6_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_6_1 0 
+paSet_txgainIdx_B1_G_6_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_6_2 0 
+paSet_txgainIdx_B1_G_6_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_6_3 0 
+paSet_txgainIdx_B1_G_6_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_6_4 0 
+paSet_txgainIdx_B1_G_6_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_6_5 0 
+paSet_txgainIdx_B1_G_6_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_6_6 0 
+paSet_txgainIdx_B1_G_6_7 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_6_7 0 
+dacGain_G_6_0 0 0 
+thermCalVal_G_6_0 121 121 
+voltCalVal_G_6_0 0 
+calOlpc2GReserved 0 0 0 
+paSet_txgainIdx_B0_G_7_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_7_0 0 
+paSet_txgainIdx_B0_G_7_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_7_1 0 
+paSet_txgainIdx_B0_G_7_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_7_2 0 
+paSet_txgainIdx_B0_G_7_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_7_3 0 
+paSet_txgainIdx_B0_G_7_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_7_4 0 
+paSet_txgainIdx_B0_G_7_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_7_5 0 
+paSet_txgainIdx_B0_G_7_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_7_6 0 
+paSet_txgainIdx_B0_G_7_7 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_7_7 0 
+paSet_txgainIdx_B1_G_7_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_7_0 0 
+paSet_txgainIdx_B1_G_7_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_7_1 0 
+paSet_txgainIdx_B1_G_7_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_7_2 0 
+paSet_txgainIdx_B1_G_7_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_7_3 0 
+paSet_txgainIdx_B1_G_7_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_7_4 0 
+paSet_txgainIdx_B1_G_7_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_7_5 0 
+paSet_txgainIdx_B1_G_7_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_7_6 0 
+paSet_txgainIdx_B1_G_7_7 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_7_7 0 
+dacGain_G_7_0 0 0 
+thermCalVal_G_7_0 121 121 
+voltCalVal_G_7_0 0 
+calOlpc2GReserved 0 0 0 
+paSet_txgainIdx_B0_G_8_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_8_0 0 
+paSet_txgainIdx_B0_G_8_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_8_1 0 
+paSet_txgainIdx_B0_G_8_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_8_2 0 
+paSet_txgainIdx_B0_G_8_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_8_3 0 
+paSet_txgainIdx_B0_G_8_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_8_4 0 
+paSet_txgainIdx_B0_G_8_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_8_5 0 
+paSet_txgainIdx_B0_G_8_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_8_6 0 
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+meas_pwr_B0_G_8_7 0 
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+meas_pwr_B1_G_8_0 0 
+paSet_txgainIdx_B1_G_8_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_8_1 0 
+paSet_txgainIdx_B1_G_8_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_8_2 0 
+paSet_txgainIdx_B1_G_8_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_8_3 0 
+paSet_txgainIdx_B1_G_8_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_8_4 0 
+paSet_txgainIdx_B1_G_8_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_8_5 0 
+paSet_txgainIdx_B1_G_8_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_8_6 0 
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+meas_pwr_B1_G_8_7 0 
+dacGain_G_8_0 0 0 
+thermCalVal_G_8_0 121 121 
+voltCalVal_G_8_0 0 
+calOlpc2GReserved 0 0 0 
+paSet_txgainIdx_B0_G_9_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_9_0 0 
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+meas_pwr_B0_G_9_1 0 
+paSet_txgainIdx_B0_G_9_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_9_2 0 
+paSet_txgainIdx_B0_G_9_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_9_3 0 
+paSet_txgainIdx_B0_G_9_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_9_4 0 
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+meas_pwr_B0_G_9_5 0 
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+meas_pwr_B0_G_9_6 0 
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+meas_pwr_B0_G_9_7 0 
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+meas_pwr_B1_G_9_0 0 
+paSet_txgainIdx_B1_G_9_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_9_1 0 
+paSet_txgainIdx_B1_G_9_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_9_2 0 
+paSet_txgainIdx_B1_G_9_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_9_3 0 
+paSet_txgainIdx_B1_G_9_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_9_4 0 
+paSet_txgainIdx_B1_G_9_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_9_5 0 
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+meas_pwr_B1_G_9_6 0 
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+meas_pwr_B1_G_9_7 0 
+dacGain_G_9_0 0 0 
+thermCalVal_G_9_0 121 121 
+voltCalVal_G_9_0 0 
+calOlpc2GReserved 0 0 0 
+paSet_txgainIdx_B0_G_10_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_10_0 0 
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+meas_pwr_B0_G_10_1 0 
+paSet_txgainIdx_B0_G_10_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_10_2 0 
+paSet_txgainIdx_B0_G_10_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_10_3 0 
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+meas_pwr_B0_G_10_4 0 
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+meas_pwr_B0_G_10_5 0 
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+meas_pwr_B0_G_10_6 0 
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+meas_pwr_B0_G_10_7 0 
+paSet_txgainIdx_B1_G_10_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_10_0 0 
+paSet_txgainIdx_B1_G_10_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_10_1 0 
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+meas_pwr_B1_G_10_2 0 
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+meas_pwr_B1_G_10_3 0 
+paSet_txgainIdx_B1_G_10_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_10_4 0 
+paSet_txgainIdx_B1_G_10_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_10_5 0 
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+meas_pwr_B1_G_10_6 0 
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+meas_pwr_B1_G_10_7 0 
+dacGain_G_10_0 0 0 
+thermCalVal_G_10_0 121 121 
+voltCalVal_G_10_0 0 
+calOlpc2GReserved 0 0 0 
+paSet_txgainIdx_B0_G_11_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_11_0 0 
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+meas_pwr_B0_G_11_1 0 
+paSet_txgainIdx_B0_G_11_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_11_2 0 
+paSet_txgainIdx_B0_G_11_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_11_3 0 
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+meas_pwr_B0_G_11_4 0 
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+meas_pwr_B0_G_11_5 0 
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+meas_pwr_B0_G_11_6 0 
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+meas_pwr_B0_G_11_7 0 
+paSet_txgainIdx_B1_G_11_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_11_0 0 
+paSet_txgainIdx_B1_G_11_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_11_1 0 
+paSet_txgainIdx_B1_G_11_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_11_2 0 
+paSet_txgainIdx_B1_G_11_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_11_3 0 
+paSet_txgainIdx_B1_G_11_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_11_4 0 
+paSet_txgainIdx_B1_G_11_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_11_5 0 
+paSet_txgainIdx_B1_G_11_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_11_6 0 
+paSet_txgainIdx_B1_G_11_7 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_11_7 0 
+dacGain_G_11_0 0 0 
+thermCalVal_G_11_0 121 121 
+voltCalVal_G_11_0 0 
+calOlpc2GReserved 0 0 0 
+paSet_txgainIdx_B0_G_12_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_12_0 0 
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+meas_pwr_B0_G_12_1 0 
+paSet_txgainIdx_B0_G_12_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_12_2 0 
+paSet_txgainIdx_B0_G_12_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_12_3 0 
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+meas_pwr_B0_G_12_4 0 
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+meas_pwr_B0_G_12_5 0 
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+meas_pwr_B0_G_12_6 0 
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+meas_pwr_B0_G_12_7 0 
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+meas_pwr_B1_G_12_0 0 
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+meas_pwr_B1_G_12_1 0 
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+meas_pwr_B1_G_12_2 0 
+paSet_txgainIdx_B1_G_12_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_12_3 0 
+paSet_txgainIdx_B1_G_12_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_12_4 0 
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+meas_pwr_B1_G_12_5 0 
+paSet_txgainIdx_B1_G_12_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_12_6 0 
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+meas_pwr_B1_G_12_7 0 
+dacGain_G_12_0 0 0 
+thermCalVal_G_12_0 121 121 
+voltCalVal_G_12_0 0 
+calOlpc2GReserved 0 0 0 
+paSet_txgainIdx_B0_G_13_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_13_0 0 
+paSet_txgainIdx_B0_G_13_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_13_1 0 
+paSet_txgainIdx_B0_G_13_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_13_2 0 
+paSet_txgainIdx_B0_G_13_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_13_3 0 
+paSet_txgainIdx_B0_G_13_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_13_4 0 
+paSet_txgainIdx_B0_G_13_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_13_5 0 
+paSet_txgainIdx_B0_G_13_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_G_13_6 0 
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+meas_pwr_B0_G_13_7 0 
+paSet_txgainIdx_B1_G_13_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_13_0 0 
+paSet_txgainIdx_B1_G_13_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_13_1 0 
+paSet_txgainIdx_B1_G_13_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_13_2 0 
+paSet_txgainIdx_B1_G_13_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_13_3 0 
+paSet_txgainIdx_B1_G_13_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_13_4 0 
+paSet_txgainIdx_B1_G_13_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_13_5 0 
+paSet_txgainIdx_B1_G_13_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_13_6 0 
+paSet_txgainIdx_B1_G_13_7 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_G_13_7 0 
+dacGain_G_13_0 0 0 
+thermCalVal_G_13_0 121 121 
+voltCalVal_G_13_0 0 
+calOlpc2GReserved 0 0 0 
+fullpdadc_read_B0_G_0_0 181 
+fullmeas_pwr_B0_G_0_0 135 
+fullpdadc_read_B0_G_0_1 115 
+fullmeas_pwr_B0_G_0_1 120 
+fullpdadc_read_B0_G_0_2 78 
+fullmeas_pwr_B0_G_0_2 107 
+fullpdadc_read_B0_G_0_3 44 
+fullmeas_pwr_B0_G_0_3 88 
+fullpdadc_read_B0_G_0_4 30 
+fullmeas_pwr_B0_G_0_4 76 
+fullpdadc_read_B0_G_0_5 0 
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+fullpdadc_read_B0_G_0_6 0 
+fullmeas_pwr_B0_G_0_6 0 
+fullpdadc_read_B0_G_0_7 0 
+fullmeas_pwr_B0_G_0_7 0 
+fullpdadc_read_B0_G_0_8 0 
+fullmeas_pwr_B0_G_0_8 0 
+fullpdadc_read_B0_G_0_9 0 
+fullmeas_pwr_B0_G_0_9 0 
+fullpdadc_read_B1_G_0_0 127 
+fullmeas_pwr_B1_G_0_0 133 
+fullpdadc_read_B1_G_0_1 78 
+fullmeas_pwr_B1_G_0_1 117 
+fullpdadc_read_B1_G_0_2 52 
+fullmeas_pwr_B1_G_0_2 102 
+fullpdadc_read_B1_G_0_3 31 
+fullmeas_pwr_B1_G_0_3 83 
+fullpdadc_read_B1_G_0_4 21 
+fullmeas_pwr_B1_G_0_4 71 
+fullpdadc_read_B1_G_0_5 0 
+fullmeas_pwr_B1_G_0_5 0 
+fullpdadc_read_B1_G_0_6 0 
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+fullpdadc_read_B1_G_0_7 0 
+fullmeas_pwr_B1_G_0_7 0 
+fullpdadc_read_B1_G_0_8 0 
+fullmeas_pwr_B1_G_0_8 0 
+fullpdadc_read_B1_G_0_9 0 
+fullmeas_pwr_B1_G_0_9 0 
+fullpdadc_read_B0_G_1_0 188 
+fullmeas_pwr_B0_G_1_0 138 
+fullpdadc_read_B0_G_1_1 120 
+fullmeas_pwr_B0_G_1_1 122 
+fullpdadc_read_B0_G_1_2 79 
+fullmeas_pwr_B0_G_1_2 109 
+fullpdadc_read_B0_G_1_3 46 
+fullmeas_pwr_B0_G_1_3 89 
+fullpdadc_read_B0_G_1_4 22 
+fullmeas_pwr_B0_G_1_4 62 
+fullpdadc_read_B0_G_1_5 0 
+fullmeas_pwr_B0_G_1_5 0 
+fullpdadc_read_B0_G_1_6 0 
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+fullpdadc_read_B0_G_1_7 0 
+fullmeas_pwr_B0_G_1_7 0 
+fullpdadc_read_B0_G_1_8 0 
+fullmeas_pwr_B0_G_1_8 0 
+fullpdadc_read_B0_G_1_9 0 
+fullmeas_pwr_B0_G_1_9 0 
+fullpdadc_read_B1_G_1_0 175 
+fullmeas_pwr_B1_G_1_0 147 
+fullpdadc_read_B1_G_1_1 115 
+fullmeas_pwr_B1_G_1_1 133 
+fullpdadc_read_B1_G_1_2 73 
+fullmeas_pwr_B1_G_1_2 119 
+fullpdadc_read_B1_G_1_3 49 
+fullmeas_pwr_B1_G_1_3 105 
+fullpdadc_read_B1_G_1_4 29 
+fullmeas_pwr_B1_G_1_4 86 
+fullpdadc_read_B1_G_1_5 0 
+fullmeas_pwr_B1_G_1_5 0 
+fullpdadc_read_B1_G_1_6 0 
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+fullpdadc_read_B1_G_1_7 0 
+fullmeas_pwr_B1_G_1_7 0 
+fullpdadc_read_B1_G_1_8 0 
+fullmeas_pwr_B1_G_1_8 0 
+fullpdadc_read_B1_G_1_9 0 
+fullmeas_pwr_B1_G_1_9 0 
+fullpdadc_read_B0_G_2_0 151 
+fullmeas_pwr_B0_G_2_0 130 
+fullpdadc_read_B0_G_2_1 94 
+fullmeas_pwr_B0_G_2_1 114 
+fullpdadc_read_B0_G_2_2 64 
+fullmeas_pwr_B0_G_2_2 100 
+fullpdadc_read_B0_G_2_3 35 
+fullmeas_pwr_B0_G_2_3 81 
+fullpdadc_read_B0_G_2_4 24 
+fullmeas_pwr_B0_G_2_4 68 
+fullpdadc_read_B0_G_2_5 0 
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+fullpdadc_read_B0_G_2_6 0 
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+fullpdadc_read_B0_G_2_7 0 
+fullmeas_pwr_B0_G_2_7 0 
+fullpdadc_read_B0_G_2_8 0 
+fullmeas_pwr_B0_G_2_8 0 
+fullpdadc_read_B0_G_2_9 0 
+fullmeas_pwr_B0_G_2_9 0 
+fullpdadc_read_B1_G_2_0 172 
+fullmeas_pwr_B1_G_2_0 140 
+fullpdadc_read_B1_G_2_1 108 
+fullmeas_pwr_B1_G_2_1 125 
+fullpdadc_read_B1_G_2_2 69 
+fullmeas_pwr_B1_G_2_2 109 
+fullpdadc_read_B1_G_2_3 46 
+fullmeas_pwr_B1_G_2_3 95 
+fullpdadc_read_B1_G_2_4 25 
+fullmeas_pwr_B1_G_2_4 75 
+fullpdadc_read_B1_G_2_5 0 
+fullmeas_pwr_B1_G_2_5 0 
+fullpdadc_read_B1_G_2_6 0 
+fullmeas_pwr_B1_G_2_6 0 
+fullpdadc_read_B1_G_2_7 0 
+fullmeas_pwr_B1_G_2_7 0 
+fullpdadc_read_B1_G_2_8 0 
+fullmeas_pwr_B1_G_2_8 0 
+fullpdadc_read_B1_G_2_9 0 
+fullmeas_pwr_B1_G_2_9 0 
+fullpdadc_read_B0_G_3_0 0 
+fullmeas_pwr_B0_G_3_0 0 
+fullpdadc_read_B0_G_3_1 0 
+fullmeas_pwr_B0_G_3_1 0 
+fullpdadc_read_B0_G_3_2 0 
+fullmeas_pwr_B0_G_3_2 0 
+fullpdadc_read_B0_G_3_3 0 
+fullmeas_pwr_B0_G_3_3 0 
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+calOffsetPierData2G_B1_G_0_0 0 0 0 0 
+offsetThreshold2G_G_0_0 0 
+calData2GFuture 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+calFreqPier5G_A_0_0 76 88 104 140 160 180 189 205 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 
+paSet_txgainIdx_B0_A_0_0 pasetting:0x3 txgainIdx:0xa 
+meas_pwr_B0_A_0_0 153 
+paSet_txgainIdx_B0_A_0_1 pasetting:0x3 txgainIdx:0x8 
+meas_pwr_B0_A_0_1 132 
+paSet_txgainIdx_B0_A_0_2 pasetting:0x3 txgainIdx:0x7 
+meas_pwr_B0_A_0_2 120 
+paSet_txgainIdx_B0_A_0_3 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B0_A_0_3 99 
+paSet_txgainIdx_B0_A_0_4 pasetting:0x3 txgainIdx:0x3 
+meas_pwr_B0_A_0_4 78 
+paSet_txgainIdx_B0_A_0_5 pasetting:0x3 txgainIdx:0x2 
+meas_pwr_B0_A_0_5 63 
+paSet_txgainIdx_B0_A_0_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_0_6 45 
+paSet_txgainIdx_B0_A_0_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_0_7 45 
+paSet_txgainIdx_B1_A_0_0 pasetting:0x3 txgainIdx:0x8 
+meas_pwr_B1_A_0_0 147 
+paSet_txgainIdx_B1_A_0_1 pasetting:0x3 txgainIdx:0x7 
+meas_pwr_B1_A_0_1 137 
+paSet_txgainIdx_B1_A_0_2 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B1_A_0_2 115 
+paSet_txgainIdx_B1_A_0_3 pasetting:0x3 txgainIdx:0x4 
+meas_pwr_B1_A_0_3 104 
+paSet_txgainIdx_B1_A_0_4 pasetting:0x3 txgainIdx:0x2 
+meas_pwr_B1_A_0_4 78 
+paSet_txgainIdx_B1_A_0_5 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_0_5 60 
+paSet_txgainIdx_B1_A_0_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_0_6 60 
+paSet_txgainIdx_B1_A_0_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_0_7 60 
+dacGain_A_0_0 -8 -8 
+thermCalVal_A_0_0 123 123 
+voltCalVal_A_0_0 0 
+calOlpc5GReserved 0 0 0 
+paSet_txgainIdx_B0_A_1_0 pasetting:0x3 txgainIdx:0xa 
+meas_pwr_B0_A_1_0 150 
+paSet_txgainIdx_B0_A_1_1 pasetting:0x3 txgainIdx:0x8 
+meas_pwr_B0_A_1_1 130 
+paSet_txgainIdx_B0_A_1_2 pasetting:0x3 txgainIdx:0x7 
+meas_pwr_B0_A_1_2 119 
+paSet_txgainIdx_B0_A_1_3 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B0_A_1_3 97 
+paSet_txgainIdx_B0_A_1_4 pasetting:0x3 txgainIdx:0x3 
+meas_pwr_B0_A_1_4 75 
+paSet_txgainIdx_B0_A_1_5 pasetting:0x3 txgainIdx:0x2 
+meas_pwr_B0_A_1_5 60 
+paSet_txgainIdx_B0_A_1_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_1_6 42 
+paSet_txgainIdx_B0_A_1_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_1_7 42 
+paSet_txgainIdx_B1_A_1_0 pasetting:0x3 txgainIdx:0x8 
+meas_pwr_B1_A_1_0 145 
+paSet_txgainIdx_B1_A_1_1 pasetting:0x3 txgainIdx:0x7 
+meas_pwr_B1_A_1_1 134 
+paSet_txgainIdx_B1_A_1_2 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B1_A_1_2 112 
+paSet_txgainIdx_B1_A_1_3 pasetting:0x3 txgainIdx:0x4 
+meas_pwr_B1_A_1_3 101 
+paSet_txgainIdx_B1_A_1_4 pasetting:0x3 txgainIdx:0x2 
+meas_pwr_B1_A_1_4 74 
+paSet_txgainIdx_B1_A_1_5 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_1_5 57 
+paSet_txgainIdx_B1_A_1_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_1_6 57 
+paSet_txgainIdx_B1_A_1_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_1_7 57 
+dacGain_A_1_0 -8 -8 
+thermCalVal_A_1_0 123 123 
+voltCalVal_A_1_0 0 
+calOlpc5GReserved 0 0 0 
+paSet_txgainIdx_B0_A_2_0 pasetting:0x3 txgainIdx:0x9 
+meas_pwr_B0_A_2_0 144 
+paSet_txgainIdx_B0_A_2_1 pasetting:0x3 txgainIdx:0x8 
+meas_pwr_B0_A_2_1 135 
+paSet_txgainIdx_B0_A_2_2 pasetting:0x3 txgainIdx:0x7 
+meas_pwr_B0_A_2_2 124 
+paSet_txgainIdx_B0_A_2_3 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B0_A_2_3 103 
+paSet_txgainIdx_B0_A_2_4 pasetting:0x3 txgainIdx:0x3 
+meas_pwr_B0_A_2_4 81 
+paSet_txgainIdx_B0_A_2_5 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_2_5 48 
+paSet_txgainIdx_B0_A_2_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_2_6 48 
+paSet_txgainIdx_B0_A_2_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_2_7 48 
+paSet_txgainIdx_B1_A_2_0 pasetting:0x3 txgainIdx:0x8 
+meas_pwr_B1_A_2_0 149 
+paSet_txgainIdx_B1_A_2_1 pasetting:0x3 txgainIdx:0x7 
+meas_pwr_B1_A_2_1 138 
+paSet_txgainIdx_B1_A_2_2 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B1_A_2_2 116 
+paSet_txgainIdx_B1_A_2_3 pasetting:0x3 txgainIdx:0x4 
+meas_pwr_B1_A_2_3 105 
+paSet_txgainIdx_B1_A_2_4 pasetting:0x3 txgainIdx:0x2 
+meas_pwr_B1_A_2_4 79 
+paSet_txgainIdx_B1_A_2_5 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_2_5 61 
+paSet_txgainIdx_B1_A_2_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_2_6 61 
+paSet_txgainIdx_B1_A_2_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_2_7 61 
+dacGain_A_2_0 -8 -8 
+thermCalVal_A_2_0 123 123 
+voltCalVal_A_2_0 0 
+calOlpc5GReserved 0 0 0 
+paSet_txgainIdx_B0_A_3_0 pasetting:0x3 txgainIdx:0x8 
+meas_pwr_B0_A_3_0 145 
+paSet_txgainIdx_B0_A_3_1 pasetting:0x3 txgainIdx:0x7 
+meas_pwr_B0_A_3_1 134 
+paSet_txgainIdx_B0_A_3_2 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B0_A_3_2 114 
+paSet_txgainIdx_B0_A_3_3 pasetting:0x3 txgainIdx:0x4 
+meas_pwr_B0_A_3_3 104 
+paSet_txgainIdx_B0_A_3_4 pasetting:0x3 txgainIdx:0x2 
+meas_pwr_B0_A_3_4 78 
+paSet_txgainIdx_B0_A_3_5 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_3_5 60 
+paSet_txgainIdx_B0_A_3_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_3_6 60 
+paSet_txgainIdx_B0_A_3_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_3_7 60 
+paSet_txgainIdx_B1_A_3_0 pasetting:0x3 txgainIdx:0x8 
+meas_pwr_B1_A_3_0 153 
+paSet_txgainIdx_B1_A_3_1 pasetting:0x3 txgainIdx:0x6 
+meas_pwr_B1_A_3_1 129 
+paSet_txgainIdx_B1_A_3_2 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B1_A_3_2 121 
+paSet_txgainIdx_B1_A_3_3 pasetting:0x3 txgainIdx:0x3 
+meas_pwr_B1_A_3_3 100 
+paSet_txgainIdx_B1_A_3_4 pasetting:0x3 txgainIdx:0x2 
+meas_pwr_B1_A_3_4 84 
+paSet_txgainIdx_B1_A_3_5 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_3_5 66 
+paSet_txgainIdx_B1_A_3_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_3_6 66 
+paSet_txgainIdx_B1_A_3_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_3_7 66 
+dacGain_A_3_0 -8 -8 
+thermCalVal_A_3_0 123 123 
+voltCalVal_A_3_0 0 
+calOlpc5GReserved 0 0 0 
+paSet_txgainIdx_B0_A_4_0 pasetting:0x3 txgainIdx:0x8 
+meas_pwr_B0_A_4_0 149 
+paSet_txgainIdx_B0_A_4_1 pasetting:0x3 txgainIdx:0x7 
+meas_pwr_B0_A_4_1 139 
+paSet_txgainIdx_B0_A_4_2 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B0_A_4_2 118 
+paSet_txgainIdx_B0_A_4_3 pasetting:0x3 txgainIdx:0x3 
+meas_pwr_B0_A_4_3 98 
+paSet_txgainIdx_B0_A_4_4 pasetting:0x3 txgainIdx:0x2 
+meas_pwr_B0_A_4_4 83 
+paSet_txgainIdx_B0_A_4_5 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_4_5 65 
+paSet_txgainIdx_B0_A_4_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_4_6 65 
+paSet_txgainIdx_B0_A_4_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_4_7 65 
+paSet_txgainIdx_B1_A_4_0 pasetting:0x3 txgainIdx:0x7 
+meas_pwr_B1_A_4_0 150 
+paSet_txgainIdx_B1_A_4_1 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B1_A_4_1 129 
+paSet_txgainIdx_B1_A_4_2 pasetting:0x3 txgainIdx:0x4 
+meas_pwr_B1_A_4_2 120 
+paSet_txgainIdx_B1_A_4_3 pasetting:0x3 txgainIdx:0x3 
+meas_pwr_B1_A_4_3 108 
+paSet_txgainIdx_B1_A_4_4 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_4_4 76 
+paSet_txgainIdx_B1_A_4_5 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_4_5 76 
+paSet_txgainIdx_B1_A_4_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_4_6 76 
+paSet_txgainIdx_B1_A_4_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_4_7 76 
+dacGain_A_4_0 -8 -8 
+thermCalVal_A_4_0 123 123 
+voltCalVal_A_4_0 0 
+calOlpc5GReserved 0 0 0 
+paSet_txgainIdx_B0_A_5_0 pasetting:0x3 txgainIdx:0x8 
+meas_pwr_B0_A_5_0 148 
+paSet_txgainIdx_B0_A_5_1 pasetting:0x3 txgainIdx:0x7 
+meas_pwr_B0_A_5_1 138 
+paSet_txgainIdx_B0_A_5_2 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B0_A_5_2 117 
+paSet_txgainIdx_B0_A_5_3 pasetting:0x3 txgainIdx:0x4 
+meas_pwr_B0_A_5_3 107 
+paSet_txgainIdx_B0_A_5_4 pasetting:0x3 txgainIdx:0x2 
+meas_pwr_B0_A_5_4 81 
+paSet_txgainIdx_B0_A_5_5 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_5_5 62 
+paSet_txgainIdx_B0_A_5_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_5_6 62 
+paSet_txgainIdx_B0_A_5_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_5_7 62 
+paSet_txgainIdx_B1_A_5_0 pasetting:0x3 txgainIdx:0x7 
+meas_pwr_B1_A_5_0 154 
+paSet_txgainIdx_B1_A_5_1 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B1_A_5_1 132 
+paSet_txgainIdx_B1_A_5_2 pasetting:0x3 txgainIdx:0x4 
+meas_pwr_B1_A_5_2 122 
+paSet_txgainIdx_B1_A_5_3 pasetting:0x3 txgainIdx:0x2 
+meas_pwr_B1_A_5_3 96 
+paSet_txgainIdx_B1_A_5_4 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_5_4 78 
+paSet_txgainIdx_B1_A_5_5 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_5_5 78 
+paSet_txgainIdx_B1_A_5_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_5_6 78 
+paSet_txgainIdx_B1_A_5_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_5_7 78 
+dacGain_A_5_0 -8 -8 
+thermCalVal_A_5_0 123 123 
+voltCalVal_A_5_0 0 
+calOlpc5GReserved 0 0 0 
+paSet_txgainIdx_B0_A_6_0 pasetting:0x3 txgainIdx:0x8 
+meas_pwr_B0_A_6_0 148 
+paSet_txgainIdx_B0_A_6_1 pasetting:0x3 txgainIdx:0x7 
+meas_pwr_B0_A_6_1 138 
+paSet_txgainIdx_B0_A_6_2 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B0_A_6_2 116 
+paSet_txgainIdx_B0_A_6_3 pasetting:0x3 txgainIdx:0x4 
+meas_pwr_B0_A_6_3 106 
+paSet_txgainIdx_B0_A_6_4 pasetting:0x3 txgainIdx:0x2 
+meas_pwr_B0_A_6_4 80 
+paSet_txgainIdx_B0_A_6_5 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_6_5 62 
+paSet_txgainIdx_B0_A_6_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_6_6 62 
+paSet_txgainIdx_B0_A_6_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_6_7 62 
+paSet_txgainIdx_B1_A_6_0 pasetting:0x3 txgainIdx:0x6 
+meas_pwr_B1_A_6_0 145 
+paSet_txgainIdx_B1_A_6_1 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B1_A_6_1 137 
+paSet_txgainIdx_B1_A_6_2 pasetting:0x3 txgainIdx:0x3 
+meas_pwr_B1_A_6_2 116 
+paSet_txgainIdx_B1_A_6_3 pasetting:0x3 txgainIdx:0x2 
+meas_pwr_B1_A_6_3 100 
+paSet_txgainIdx_B1_A_6_4 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_6_4 82 
+paSet_txgainIdx_B1_A_6_5 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_6_5 82 
+paSet_txgainIdx_B1_A_6_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_6_6 82 
+paSet_txgainIdx_B1_A_6_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_6_7 82 
+dacGain_A_6_0 -8 -8 
+thermCalVal_A_6_0 123 123 
+voltCalVal_A_6_0 0 
+calOlpc5GReserved 0 0 0 
+paSet_txgainIdx_B0_A_7_0 pasetting:0x3 txgainIdx:0x8 
+meas_pwr_B0_A_7_0 150 
+paSet_txgainIdx_B0_A_7_1 pasetting:0x3 txgainIdx:0x7 
+meas_pwr_B0_A_7_1 139 
+paSet_txgainIdx_B0_A_7_2 pasetting:0x3 txgainIdx:0x5 
+meas_pwr_B0_A_7_2 118 
+paSet_txgainIdx_B0_A_7_3 pasetting:0x3 txgainIdx:0x3 
+meas_pwr_B0_A_7_3 96 
+paSet_txgainIdx_B0_A_7_4 pasetting:0x3 txgainIdx:0x2 
+meas_pwr_B0_A_7_4 81 
+paSet_txgainIdx_B0_A_7_5 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_7_5 63 
+paSet_txgainIdx_B0_A_7_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_7_6 63 
+paSet_txgainIdx_B0_A_7_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B0_A_7_7 63 
+paSet_txgainIdx_B1_A_7_0 pasetting:0x3 txgainIdx:0x6 
+meas_pwr_B1_A_7_0 148 
+paSet_txgainIdx_B1_A_7_1 pasetting:0x3 txgainIdx:0x4 
+meas_pwr_B1_A_7_1 131 
+paSet_txgainIdx_B1_A_7_2 pasetting:0x3 txgainIdx:0x3 
+meas_pwr_B1_A_7_2 119 
+paSet_txgainIdx_B1_A_7_3 pasetting:0x3 txgainIdx:0x2 
+meas_pwr_B1_A_7_3 104 
+paSet_txgainIdx_B1_A_7_4 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_7_4 86 
+paSet_txgainIdx_B1_A_7_5 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_7_5 86 
+paSet_txgainIdx_B1_A_7_6 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_7_6 86 
+paSet_txgainIdx_B1_A_7_7 pasetting:0x3 txgainIdx:0x1 
+meas_pwr_B1_A_7_7 86 
+dacGain_A_7_0 -8 -8 
+thermCalVal_A_7_0 123 123 
+voltCalVal_A_7_0 0 
+calOlpc5GReserved 0 0 0 
+paSet_txgainIdx_B0_A_8_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_A_8_0 0 
+paSet_txgainIdx_B0_A_8_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_A_8_1 0 
+paSet_txgainIdx_B0_A_8_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_A_8_2 0 
+paSet_txgainIdx_B0_A_8_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_A_8_3 0 
+paSet_txgainIdx_B0_A_8_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_A_8_4 0 
+paSet_txgainIdx_B0_A_8_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_A_8_5 0 
+paSet_txgainIdx_B0_A_8_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_A_8_6 0 
+paSet_txgainIdx_B0_A_8_7 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_A_8_7 0 
+paSet_txgainIdx_B1_A_8_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_A_8_0 0 
+paSet_txgainIdx_B1_A_8_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_A_8_1 0 
+paSet_txgainIdx_B1_A_8_2 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_A_8_2 0 
+paSet_txgainIdx_B1_A_8_3 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_A_8_3 0 
+paSet_txgainIdx_B1_A_8_4 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_A_8_4 0 
+paSet_txgainIdx_B1_A_8_5 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_A_8_5 0 
+paSet_txgainIdx_B1_A_8_6 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_A_8_6 0 
+paSet_txgainIdx_B1_A_8_7 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B1_A_8_7 0 
+dacGain_A_8_0 0 0 
+thermCalVal_A_8_0 121 121 
+voltCalVal_A_8_0 0 
+calOlpc5GReserved 0 0 0 
+paSet_txgainIdx_B0_A_9_0 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_A_9_0 0 
+paSet_txgainIdx_B0_A_9_1 pasetting:0x0 txgainIdx:0x0 
+meas_pwr_B0_A_9_1 0 
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+meas_pwr_B1_A_9_7 0 
+dacGain_A_9_0 0 0 
+thermCalVal_A_9_0 121 121 
+voltCalVal_A_9_0 0 
+calOlpc5GReserved 0 0 0 
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+meas_pwr_B0_A_10_0 0 
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+meas_pwr_B1_A_10_7 0 
+dacGain_A_10_0 0 0 
+thermCalVal_A_10_0 121 121 
+voltCalVal_A_10_0 0 
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+thermCalVal_A_11_0 121 121 
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+thermCalVal_A_12_0 121 121 
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+thermCalVal_A_13_0 121 121 
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+thermCalVal_A_15_0 121 121 
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+thermCalVal_A_16_0 121 121 
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+dacGain_A_17_0 0 0 
+thermCalVal_A_17_0 121 121 
+voltCalVal_A_17_0 0 
+calOlpc5GReserved 0 0 0 
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+meas_pwr_B1_A_18_7 0 
+dacGain_A_18_0 0 0 
+thermCalVal_A_18_0 121 121 
+voltCalVal_A_18_0 0 
+calOlpc5GReserved 0 0 0 
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+meas_pwr_B1_A_19_7 0 
+dacGain_A_19_0 0 0 
+thermCalVal_A_19_0 121 121 
+voltCalVal_A_19_0 0 
+calOlpc5GReserved 0 0 0 
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+meas_pwr_B0_A_20_0 0 
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+dacGain_A_20_0 0 0 
+thermCalVal_A_20_0 121 121 
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+thermCalVal_A_21_0 121 121 
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+thermCalVal_A_22_0 121 121 
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+thermCalVal_A_23_0 121 121 
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+thermCalVal_A_25_0 121 121 
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+thermCalVal_A_26_0 121 121 
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+thermCalVal_A_27_0 121 121 
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+fullmeas_pwr_B1_A_29_0 0 
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+fullpdadc_read_B0_A_30_0 0 
+fullmeas_pwr_B0_A_30_0 0 
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+fullpdadc_read_B0_A_30_2 0 
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+fullpdadc_read_B0_A_30_3 0 
+fullmeas_pwr_B0_A_30_3 0 
+fullpdadc_read_B0_A_30_4 0 
+fullmeas_pwr_B0_A_30_4 0 
+fullpdadc_read_B0_A_30_5 0 
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+fullpdadc_read_B0_A_30_6 0 
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+fullpdadc_read_B1_A_30_4 0 
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+fullpdadc_read_B1_A_31_8 0 
+fullmeas_pwr_B1_A_31_8 0 
+fullpdadc_read_B1_A_31_9 0 
+fullmeas_pwr_B1_A_31_9 0 
+calOffsetFreqPier5G_A_0_0 76 88 92 104 140 160 180 189 
+calOffsetPierData5G_B0_A_0_0 0 0 0 0 0 0 0 0 
+calOffsetPierData5G_B1_A_0_0 0 0 0 0 0 0 0 0 
+offsetThreshold5G_A_0_0 0 
+calData5GFuture 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+nvTpcConfigId__0_0 9 
+nvTpcConfigLen__0_0 920 
+nvTpcConfigFlag__0_0 0x0 
+gainIdxForCal_G_0_0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 
+dacGainForCal_G_0_0 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 
+paConfigForCal_G_0_0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+calDataTgtPwr_G_0_0 12 37 56 72 96 112 128 144 160 176 192 208 224 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 
+calPwrTargets_G_0_0 144 128 112 96 72 48 0 0 
+calPdadcTargets_G_0_0 200 125 80 50 30 0 0 0 0 0 
+pdetAttenProfile_32nddb_G_0_0 36 36 35 36 36 35 37 34 33 33 35 34 33 34 34 
+pdetTiaGainProfile_8thdb_G_0_0 40 
+alutOffset_G_0_0 0 
+pdetRange_8thdb_G_0_0 8 
+txPwrOffset_G_0_0 0 
+valid_G_0_0 1 
+minDacGainMargin_G_0_0 8 
+unused_G_0_0 0 
+gainIdxForCal_A_0_0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 
+dacGainForCal_A_0_0 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 -8 
+paConfigForCal_A_0_0 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 
+calDataTgtPwr_A_0_0 12 37 56 72 96 112 128 144 160 176 192 208 224 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 
+calPwrTargets_A_0_0 144 128 112 96 72 48 0 0 
+calPdadcTargets_A_0_0 200 125 80 50 30 0 0 0 0 0 
+pdetAttenProfile_32nddb_A_0_0 37 37 36 37 37 36 35 34 33 32 35 33 33 34 33 
+pdetTiaGainProfile_8thdb_A_0_0 88 
+alutOffset_A_0_0 3 
+pdetRange_8thdb_A_0_0 8 
+txPwrOffset_A_0_0 0 
+valid_A_0_0 1 
+minDacGainMargin_A_0_0 8 
+unused_A_0_0 0 
+powerOffset_HT20_G_0_0 0 0 0 0 0 0 0 0 0 0 
+powerOffset_HT40_G_0_0 0 0 0 0 0 0 0 0 0 0 
+powerOffset_VHT80_G_0_0 0 0 0 0 0 0 0 0 0 0 
+powerOffset_VHT160_G_0_0 0 0 0 0 0 0 0 0 0 0 
+powerOffset_HT20_A_0_0 0 0 0 0 0 0 0 0 0 0 
+powerOffset_HT40_A_0_0 0 0 0 0 0 0 0 0 0 0 
+powerOffset_VHT80_A_0_0 0 0 0 0 0 0 0 0 0 0 
+powerOffset_VHT160_A_0_0 0 0 0 0 0 0 0 0 0 0 
+powerOffsetByChan2G_chan_G_0_0 0 0 0 0 
+powerOffsetByChan2G_chanOffset_0_G_0_0 0 0 
+powerOffsetByChan2G_chanOffset_1_G_0_0 0 0 
+powerOffsetByChan2G_chanOffset_2_G_0_0 0 0 
+powerOffsetByChan2G_chanOffset_3_G_0_0 0 0 
+powerOffsetByChan2G_ht20HI_G_0_0 0 0 
+powerOffsetByChan2G_ht20MI_G_0_0 0 0 
+powerOffsetByChan2G_ht20LO_G_0_0 0 0 
+powerOffsetByChan2G_ht20pad_G_0_0 0 0 
+powerOffsetByChan2G_ht40HI_G_0_0 0 0 
+powerOffsetByChan2G_ht40MI_G_0_0 0 0 
+powerOffsetByChan2G_ht40LO_G_0_0 0 0 
+powerOffsetByChan2G_ht40pad_G_0_0 0 0 
+powerOffsetByChan2G_thr_G_0_0 0x0 
+powerOffsetByChan2G_pad_G_0_0 0x0 0x0 0x0 
+powerOffsetByChan5G_chan_A_0_0 0 0 0 0 0 0 0 0 
+powerOffsetByChan5G_chanOffset_0_A_0_0 0 0 
+powerOffsetByChan5G_chanOffset_1_A_0_0 0 0 
+powerOffsetByChan5G_chanOffset_2_A_0_0 0 0 
+powerOffsetByChan5G_chanOffset_3_A_0_0 0 0 
+powerOffsetByChan5G_chanOffset_4_A_0_0 0 0 
+powerOffsetByChan5G_chanOffset_5_A_0_0 0 0 
+powerOffsetByChan5G_chanOffset_6_A_0_0 0 0 
+powerOffsetByChan5G_chanOffset_7_A_0_0 0 0 
+powerOffsetByChan5G_ht20HI_A_0_0 0 0 
+powerOffsetByChan5G_ht20MI_A_0_0 0 0 
+powerOffsetByChan5G_ht20LO_A_0_0 0 0 
+powerOffsetByChan5G_ht20pad_A_0_0 0 0 
+powerOffsetByChan5G_ht40HI_A_0_0 0 0 
+powerOffsetByChan5G_ht40MI_A_0_0 0 0 
+powerOffsetByChan5G_ht40LO_A_0_0 0 0 
+powerOffsetByChan5G_ht40pad_A_0_0 0 0 
+powerOffsetByChan5G_ht80HI_A_0_0 0 0 
+powerOffsetByChan5G_ht80MI_A_0_0 0 0 
+powerOffsetByChan5G_ht80LO_A_0_0 0 0 
+powerOffsetByChan5G_ht80pad_A_0_0 0 0 
+powerOffsetByChan5G_thr_A_0_0 0x0 
+powerOffsetByChan5G_pad_A_0_0 0x0 0x0 0x0 
+clpcPowerOffsetPad 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 36 36 35 36 36 35 37 34 33 33 35 34 33 34 33 36 36 35 36 36 35 37 34 33 33 35 34 33 34 33 0 0 36 36 35 36 36 35 37 34 33 33 35 34 33 34 33 36 36 35 36 36 35 37 34 33 33 35 34 33 34 33 0 0 37 37 36 37 37 36 35 34 33 32 35 33 33 34 33 37 37 36 37 37 36 35 34 33 32 35 33 33 34 33 0 0 37 37 36 37 37 36 35 34 33 32 35 33 33 34 33 37 37 36 37 37 36 35 34 33 32 35 33 33 34 33 0 0 
+clpc_power_offset_cck_G_0_0 0 
+clpc_power_offset_ofdm20_G_0_0 0 
+clpc_power_offset_ofdm20_hc_G_0_0 0 
+clpc_power_offset_ofdm40_G_0_0 0 
+clpc_power_offset_ofdm40_hc_G_0_0 0 
+clpc_power_offset_ofdm80_G_0_0 0 
+clpc_power_offset_ofdm80_hc_G_0_0 0 
+reserved_G_0_0 0 
+clpc_power_offset_cck_A_0_0 0 
+clpc_power_offset_ofdm20_A_0_0 0 
+clpc_power_offset_ofdm20_hc_A_0_0 0 
+clpc_power_offset_ofdm40_A_0_0 0 
+clpc_power_offset_ofdm40_hc_A_0_0 0 
+clpc_power_offset_ofdm80_A_0_0 0 
+clpc_power_offset_ofdm80_hc_A_0_0 0 
+reserved_A_0_0 0 
+clpc_power_offset_ofdm40_lte_coex_G_0_0 0 0 0 0 0 0 0 0 0 
+clpc_power_offset_lte_coex_reserved_G_0_0 0 0 0 
+TPCPowerMeasurementDelay__0_0 0 
+tempThreshold__0_0 0 0 
+tempPowerOffset2G_G_0_0 0 0 
+tempPowerOffset5G_A_0_0 0 0 
+alutTargetLoOffset__0_0 0 
+alutTargetHiOffset__0_0 0 
+clpcPowerOffsetCckChan_G_0_0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+tpcPad__0_0 0 
+ch1gainIdxForCal_G_0_0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+ch1paConfigForCal_G_0_0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+ch1calDataTgtPwr_G_0_0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+ch1gainIdxForCal_A_0_0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+ch1paConfigForCal_A_0_0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+ch1calDataTgtPwr_A_0_0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+gainIdxForCalBitmapGrp1_G_0_0 0x0 
+glutPwrsMapBitMapGrp1_G_0_0 0x0 
+gainIdxForCalBitmapGrp1_A_0_0 0x0 
+glutPwrsMapBitMapGrp1_A_0_0 0x0 
+gainIdxForCalBitmapGrp2_G_0_0 0x0 
+glutPwrsMapBitMapGrp2_G_0_0 0x0 
+gainIdxForCalBitmapGrp2_A_0_0 0x0 
+glutPwrsMapBitMapGrp2_A_0_0 0x0 
+gainIdxForCalBitmapGrp3_G_0_0 0x0 
+glutPwrsMapBitMapGrp3_G_0_0 0x0 
+gainIdxForCalBitmapGrp3_A_0_0 0x0 
+glutPwrsMapBitMapGrp3_A_0_0 0x0 
+gainIdxForCalBitmapGrp4_G_0_0 0x0 
+glutPwrsMapBitMapGrp4_G_0_0 0x0 
+gainIdxForCalBitmapGrp4_A_0_0 0x0 
+glutPwrsMapBitMapGrp4_A_0_0 0x0 
+calOffsetPower__0_0 30 
+maxCalTgtPwr2G_G_0_0 0 
+maxCalTgtPwr5G_A_0_0 0 
+dupGlut2G_G_0_0 0x0 0x0 0x0 0x0 
+dupGlut5G_A_0_0 0x0 0x0 0x0 0x0 
+numGlutEntries2G_G_0_0 0 
+numGlutEntries5G_A_0_0 0 
+WriteOnePointCalToOTPFlags_A_0_0 0 
+alutFuture 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+nvTpcCompId__0_0 10 
+nvTpcCompLen__0_0 928 
+nvTpcCompFlag__0_0 0x0 
+tempCompChans2G_B0_G_0_0 112 137 157 172 
+tempCompChans2G_B1_G_0_0 112 137 157 172 
+alphaThermTbl2G_B0_G_0_0 0x25 0x25 0x25 0x25 
+alphaThermTbl2G_B0_G_1_0 0x25 0x25 0x25 0x25 
+alphaThermTbl2G_B0_G_2_0 0x25 0x25 0x25 0x25 
+alphaThermTbl2G_B0_G_3_0 0x25 0x25 0x25 0x25 
+alphaThermTbl2G_B1_G_0_0 0x25 0x25 0x25 0x25 
+alphaThermTbl2G_B1_G_1_0 0x25 0x25 0x25 0x25 
+alphaThermTbl2G_B1_G_2_0 0x25 0x25 0x25 0x25 
+alphaThermTbl2G_B1_G_3_0 0x25 0x25 0x25 0x25 
+pdetTempComp2G 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+tempCompChans5G_B0_A_0_0 76 88 92 104 140 160 180 201 
+tempCompChans5G_B1_A_0_0 76 88 92 104 140 160 180 201 
+alphaThermTbl5G_B0_A_0_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B0_A_1_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B0_A_2_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B0_A_3_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B0_A_4_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B0_A_5_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B0_A_6_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B0_A_7_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B1_A_0_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B1_A_1_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B1_A_2_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B1_A_3_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B1_A_4_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B1_A_5_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B1_A_6_0 0x27 0x26 0x25 0x24 
+alphaThermTbl5G_B1_A_7_0 0x27 0x26 0x25 0x24 
+pdetTempComp5G 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+secondChannelGLUTOffset_0_A_0_0 0 0 0 0 0 0 
+secondChannelGLUTOffset_1_A_0_0 0 0 0 0 0 0 
+secondChannelGLUTOffset_2_A_0_0 0 0 0 0 0 0 
+secondChannelGLUTOffset_3_A_0_0 0 0 0 0 0 0 
+secondChannelGLUTOffset_4_A_0_0 0 0 0 0 0 0 
+secondChannelGLUTOffset_5_A_0_0 0 0 0 0 0 0 
+nvTargetPwrId__0_0 11 
+nvTargetPwrLen__0_0 1028 
+nvTargetPwrFlag__0_0 0x0 
+targetPowerR2PTable_11bg_1_14_0_0 36 36 36 36 33 33 33 33 33 32 31 31 
+targetPowerR2PTable_HT20_1_14_0_0 33 33 33 33 33 31 31 30 33 33 33 33 33 31 31 30 
+targetPowerR2PTable_HT40_1_14_0_0 32 32 32 32 32 30 30 29 32 32 32 32 32 30 30 29 
+targetPowerR2PTable_VHT20_1_14_0_0 33 33 33 33 33 31 31 30 27 27 33 33 33 33 33 31 31 30 27 27 
+targetPowerR2PTable_VHT40_1_14_0_0 32 32 32 32 32 30 30 29 26 25 32 32 32 32 32 30 30 29 26 25 
+targetPowerR2PTable_VHT80_1_14_0_0 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 
+targetPowerR2PTable_VHT160_1_14_0_0 20 20 20 20 20 20 20 20 20 20 
+targetPowerR2PTable_DupExt_1_14_0_0 32 32 32 32 32 
+targetPowerTempThresh_G_0_0 0 0 
+targetPowerTempOffset_G_0_0 0 0 
+targetPowerEnablePerChainLimit_G_0_0 0x0 
+targetPowerPerChainLimit_G_0_0 0 0 
+targetPower2GFuture 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+targetPowerR2PTable_11bg_36_64_0_0 34 34 34 34 34 34 34 34 34 33 32 32 
+targetPowerR2PTable_HT20_36_64_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 
+targetPowerR2PTable_HT40_36_64_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 
+targetPowerR2PTable_VHT20_36_64_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 
+targetPowerR2PTable_VHT40_36_64_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 
+targetPowerR2PTable_VHT80_36_64_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 
+targetPowerR2PTable_VHT160_36_64_0_0 20 20 20 20 20 20 20 20 20 20 
+targetPowerR2PTable_DupExt_36_64_0_0 34 34 34 34 34 
+targetPowerR2PTable_11bg_100_144_0_0 34 34 34 34 34 34 34 34 34 33 32 32 
+targetPowerR2PTable_HT20_100_144_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 
+targetPowerR2PTable_HT40_100_144_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 
+targetPowerR2PTable_VHT20_100_144_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 
+targetPowerR2PTable_VHT40_100_144_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 
+targetPowerR2PTable_VHT80_100_144_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 
+targetPowerR2PTable_VHT160_100_144_0_0 20 20 20 20 20 20 20 20 20 20 
+targetPowerR2PTable_DupExt_100_144_0_0 34 34 34 34 34 
+targetPowerR2PTable_11bg_149_183_0_0 34 34 34 34 34 34 34 34 34 33 32 32 
+targetPowerR2PTable_HT20_149_183_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 
+targetPowerR2PTable_HT40_149_183_0_0 34 34 34 34 34 34 32 30 34 34 34 34 34 34 32 30 
+targetPowerR2PTable_VHT20_149_183_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 
+targetPowerR2PTable_VHT40_149_183_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 
+targetPowerR2PTable_VHT80_149_183_0_0 34 34 34 34 34 34 32 30 28 28 34 34 34 34 34 34 32 30 28 28 
+targetPowerR2PTable_VHT160_149_183_0_0 20 20 20 20 20 20 20 20 20 20 
+targetPowerR2PTable_DupExt_149_183_0_0 34 34 34 34 34 
+targetPowerTempThresh_A_0_0 0 0 
+targetPowerTempOffset_A_0_0 0 0 
+targetPowerEnablePerChainLimit_A_0_0 0x0 
+targetPowerPerChainLimit_A_0_0 0 0 
+clpcACKPowerOffsetCckG__0_0 0 
+clpcACKPowerOffsetOfdmG__0_0 0 
+clpcACKPowerOffsetOfdmA__0_0 0 
+futureSelfGenA__0_0 0 0 0 0 0 
+targetPower5GFuture 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+nvCtlId__0_0 12 
+nvCtlLen__0_0 3432 
+nvCtlFlag__0_0 0x0 
+ctlIndex2G_11b_mode_0_G_0_0 1 
+ctlIndex2G_11b_bf_reg_0_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex2G_11b_numChMask_0_G_0_0 0x2 
+ctlIndex2G_11b_numSSMask_0_G_0_0 0x1 
+ctlIndex2G_11b_mode_1_G_0_0 1 
+ctlIndex2G_11b_bf_reg_1_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex2G_11b_numChMask_1_G_0_0 0x1 
+ctlIndex2G_11b_numSSMask_1_G_0_0 0x1 
+ctlIndex2G_11b_mode_2_G_0_0 1 
+ctlIndex2G_11b_bf_reg_2_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex2G_11b_numChMask_2_G_0_0 0x2 
+ctlIndex2G_11b_numSSMask_2_G_0_0 0x1 
+ctlIndex2G_11b_mode_3_G_0_0 1 
+ctlIndex2G_11b_bf_reg_3_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex2G_11b_numChMask_3_G_0_0 0x1 
+ctlIndex2G_11b_numSSMask_3_G_0_0 0x1 
+ctlIndex2G_11b_mode_4_G_0_0 1 
+ctlIndex2G_11b_bf_reg_4_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex2G_11b_numChMask_4_G_0_0 0x2 
+ctlIndex2G_11b_numSSMask_4_G_0_0 0x1 
+ctlIndex2G_11b_mode_5_G_0_0 1 
+ctlIndex2G_11b_bf_reg_5_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex2G_11b_numChMask_5_G_0_0 0x1 
+ctlIndex2G_11b_numSSMask_5_G_0_0 0x1 
+ctlFreqbin2G_11b_G_0_0 112 117 122 127 132 137 142 147 152 157 162 167 172 184 
+ctl2G11bReserved_G_0_0 0 0 
+ctlData2G_11b_0_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_11b_1_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_11b_2_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_11b_3_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_11b_4_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_11b_5_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlIndex2G_HT20_mode_0_G_0_0 2 
+ctlIndex2G_HT20_bf_reg_0_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex2G_HT20_numChMask_0_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_0_G_0_0 0x1 
+ctlIndex2G_HT20_mode_1_G_0_0 2 
+ctlIndex2G_HT20_bf_reg_1_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex2G_HT20_numChMask_1_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_1_G_0_0 0x2 
+ctlIndex2G_HT20_mode_2_G_0_0 2 
+ctlIndex2G_HT20_bf_reg_2_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex2G_HT20_numChMask_2_G_0_0 0x1 
+ctlIndex2G_HT20_numSSMask_2_G_0_0 0x1 
+ctlIndex2G_HT20_mode_3_G_0_0 2 
+ctlIndex2G_HT20_bf_reg_3_G_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
+ctlIndex2G_HT20_numChMask_3_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_3_G_0_0 0x1 
+ctlIndex2G_HT20_mode_4_G_0_0 0 
+ctlIndex2G_HT20_bf_reg_4_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex2G_HT20_numChMask_4_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_4_G_0_0 0x1 
+ctlIndex2G_HT20_mode_5_G_0_0 0 
+ctlIndex2G_HT20_bf_reg_5_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex2G_HT20_numChMask_5_G_0_0 0x1 
+ctlIndex2G_HT20_numSSMask_5_G_0_0 0x1 
+ctlIndex2G_HT20_mode_6_G_0_0 0 
+ctlIndex2G_HT20_bf_reg_6_G_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
+ctlIndex2G_HT20_numChMask_6_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_6_G_0_0 0x1 
+ctlIndex2G_HT20_mode_7_G_0_0 2 
+ctlIndex2G_HT20_bf_reg_7_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex2G_HT20_numChMask_7_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_7_G_0_0 0x1 
+ctlIndex2G_HT20_mode_8_G_0_0 2 
+ctlIndex2G_HT20_bf_reg_8_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex2G_HT20_numChMask_8_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_8_G_0_0 0x2 
+ctlIndex2G_HT20_mode_9_G_0_0 2 
+ctlIndex2G_HT20_bf_reg_9_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex2G_HT20_numChMask_9_G_0_0 0x1 
+ctlIndex2G_HT20_numSSMask_9_G_0_0 0x1 
+ctlIndex2G_HT20_mode_10_G_0_0 2 
+ctlIndex2G_HT20_bf_reg_10_G_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
+ctlIndex2G_HT20_numChMask_10_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_10_G_0_0 0x1 
+ctlIndex2G_HT20_mode_11_G_0_0 0 
+ctlIndex2G_HT20_bf_reg_11_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex2G_HT20_numChMask_11_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_11_G_0_0 0x1 
+ctlIndex2G_HT20_mode_12_G_0_0 0 
+ctlIndex2G_HT20_bf_reg_12_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex2G_HT20_numChMask_12_G_0_0 0x1 
+ctlIndex2G_HT20_numSSMask_12_G_0_0 0x1 
+ctlIndex2G_HT20_mode_13_G_0_0 0 
+ctlIndex2G_HT20_bf_reg_13_G_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
+ctlIndex2G_HT20_numChMask_13_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_13_G_0_0 0x1 
+ctlIndex2G_HT20_mode_14_G_0_0 2 
+ctlIndex2G_HT20_bf_reg_14_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex2G_HT20_numChMask_14_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_14_G_0_0 0x1 
+ctlIndex2G_HT20_mode_15_G_0_0 2 
+ctlIndex2G_HT20_bf_reg_15_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex2G_HT20_numChMask_15_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_15_G_0_0 0x2 
+ctlIndex2G_HT20_mode_16_G_0_0 2 
+ctlIndex2G_HT20_bf_reg_16_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex2G_HT20_numChMask_16_G_0_0 0x1 
+ctlIndex2G_HT20_numSSMask_16_G_0_0 0x1 
+ctlIndex2G_HT20_mode_17_G_0_0 2 
+ctlIndex2G_HT20_bf_reg_17_G_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
+ctlIndex2G_HT20_numChMask_17_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_17_G_0_0 0x1 
+ctlIndex2G_HT20_mode_18_G_0_0 0 
+ctlIndex2G_HT20_bf_reg_18_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex2G_HT20_numChMask_18_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_18_G_0_0 0x1 
+ctlIndex2G_HT20_mode_19_G_0_0 0 
+ctlIndex2G_HT20_bf_reg_19_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex2G_HT20_numChMask_19_G_0_0 0x1 
+ctlIndex2G_HT20_numSSMask_19_G_0_0 0x1 
+ctlIndex2G_HT20_mode_20_G_0_0 0 
+ctlIndex2G_HT20_bf_reg_20_G_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
+ctlIndex2G_HT20_numChMask_20_G_0_0 0x2 
+ctlIndex2G_HT20_numSSMask_20_G_0_0 0x1 
+ctlFreqbin2G_HT20_G_0_0 112 117 122 127 132 137 142 147 152 157 162 167 172 184 
+ctlData2G_HT20_0_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_1_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_2_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_3_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_4_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_5_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_6_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_7_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_8_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_9_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_10_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_11_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_12_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_13_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_14_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_15_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_16_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_17_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_18_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_19_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT20_20_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlPad2 0 0 
+ctlIndex2G_HT40_mode_0_G_0_0 3 
+ctlIndex2G_HT40_bf_reg_0_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex2G_HT40_numChMask_0_G_0_0 0x2 
+ctlIndex2G_HT40_numSSMask_0_G_0_0 0x1 
+ctlIndex2G_HT40_mode_1_G_0_0 3 
+ctlIndex2G_HT40_bf_reg_1_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex2G_HT40_numChMask_1_G_0_0 0x2 
+ctlIndex2G_HT40_numSSMask_1_G_0_0 0x2 
+ctlIndex2G_HT40_mode_2_G_0_0 3 
+ctlIndex2G_HT40_bf_reg_2_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex2G_HT40_numChMask_2_G_0_0 0x1 
+ctlIndex2G_HT40_numSSMask_2_G_0_0 0x1 
+ctlIndex2G_HT40_mode_3_G_0_0 3 
+ctlIndex2G_HT40_bf_reg_3_G_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
+ctlIndex2G_HT40_numChMask_3_G_0_0 0x2 
+ctlIndex2G_HT40_numSSMask_3_G_0_0 0x1 
+ctlIndex2G_HT40_mode_4_G_0_0 3 
+ctlIndex2G_HT40_bf_reg_4_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex2G_HT40_numChMask_4_G_0_0 0x2 
+ctlIndex2G_HT40_numSSMask_4_G_0_0 0x1 
+ctlIndex2G_HT40_mode_5_G_0_0 3 
+ctlIndex2G_HT40_bf_reg_5_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex2G_HT40_numChMask_5_G_0_0 0x2 
+ctlIndex2G_HT40_numSSMask_5_G_0_0 0x2 
+ctlIndex2G_HT40_mode_6_G_0_0 3 
+ctlIndex2G_HT40_bf_reg_6_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex2G_HT40_numChMask_6_G_0_0 0x1 
+ctlIndex2G_HT40_numSSMask_6_G_0_0 0x1 
+ctlIndex2G_HT40_mode_7_G_0_0 3 
+ctlIndex2G_HT40_bf_reg_7_G_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
+ctlIndex2G_HT40_numChMask_7_G_0_0 0x2 
+ctlIndex2G_HT40_numSSMask_7_G_0_0 0x1 
+ctlIndex2G_HT40_mode_8_G_0_0 3 
+ctlIndex2G_HT40_bf_reg_8_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex2G_HT40_numChMask_8_G_0_0 0x2 
+ctlIndex2G_HT40_numSSMask_8_G_0_0 0x1 
+ctlIndex2G_HT40_mode_9_G_0_0 3 
+ctlIndex2G_HT40_bf_reg_9_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex2G_HT40_numChMask_9_G_0_0 0x2 
+ctlIndex2G_HT40_numSSMask_9_G_0_0 0x2 
+ctlIndex2G_HT40_mode_10_G_0_0 3 
+ctlIndex2G_HT40_bf_reg_10_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex2G_HT40_numChMask_10_G_0_0 0x1 
+ctlIndex2G_HT40_numSSMask_10_G_0_0 0x1 
+ctlIndex2G_HT40_mode_11_G_0_0 3 
+ctlIndex2G_HT40_bf_reg_11_G_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
+ctlIndex2G_HT40_numChMask_11_G_0_0 0x2 
+ctlIndex2G_HT40_numSSMask_11_G_0_0 0x1 
+ctlFreqbin2G_HT40_G_0_0 122 127 132 137 142 147 152 157 162 
+ctl2GHT40Reserved_G_0_0 0 0 0 
+ctlData2G_HT40_0_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT40_1_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT40_2_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT40_3_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT40_4_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT40_5_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT40_6_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT40_7_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT40_8_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT40_9_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT40_10_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlData2G_HT40_11_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
+ctlSpare2G 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+ctlIndex5G_11a_mode_0_A_0_0 0 
+ctlIndex5G_11a_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex5G_11a_numChMask_0_A_0_0 0x2 
+ctlIndex5G_11a_numSSMask_0_A_0_0 0x1 
+ctlIndex5G_11a_mode_1_A_0_0 0 
+ctlIndex5G_11a_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex5G_11a_numChMask_1_A_0_0 0x1 
+ctlIndex5G_11a_numSSMask_1_A_0_0 0x1 
+ctlIndex5G_11a_mode_2_A_0_0 0 
+ctlIndex5G_11a_bf_reg_2_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
+ctlIndex5G_11a_numChMask_2_A_0_0 0x2 
+ctlIndex5G_11a_numSSMask_2_A_0_0 0x1 
+ctlIndex5G_11a_mode_3_A_0_0 0 
+ctlIndex5G_11a_bf_reg_3_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex5G_11a_numChMask_3_A_0_0 0x2 
+ctlIndex5G_11a_numSSMask_3_A_0_0 0x1 
+ctlIndex5G_11a_mode_4_A_0_0 0 
+ctlIndex5G_11a_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex5G_11a_numChMask_4_A_0_0 0x1 
+ctlIndex5G_11a_numSSMask_4_A_0_0 0x1 
+ctlIndex5G_11a_mode_5_A_0_0 0 
+ctlIndex5G_11a_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
+ctlIndex5G_11a_numChMask_5_A_0_0 0x2 
+ctlIndex5G_11a_numSSMask_5_A_0_0 0x1 
+ctlIndex5G_11a_mode_6_A_0_0 0 
+ctlIndex5G_11a_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex5G_11a_numChMask_6_A_0_0 0x2 
+ctlIndex5G_11a_numSSMask_6_A_0_0 0x1 
+ctlIndex5G_11a_mode_7_A_0_0 0 
+ctlIndex5G_11a_bf_reg_7_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex5G_11a_numChMask_7_A_0_0 0x1 
+ctlIndex5G_11a_numSSMask_7_A_0_0 0x1 
+ctlIndex5G_11a_mode_8_A_0_0 0 
+ctlIndex5G_11a_bf_reg_8_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
+ctlIndex5G_11a_numChMask_8_A_0_0 0x2 
+ctlIndex5G_11a_numSSMask_8_A_0_0 0x1 
+ctlFreqbin5G_11a_A_0_0 76 80 84 88 92 96 100 104 140 144 148 152 156 160 164 168 172 176 180 184 189 193 197 201 205 255 255 255 255 
+ctl5G11aReserved_A_0_0 0 
+ctlData5G_11a_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_11a_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_11a_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_11a_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_11a_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_11a_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_11a_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_11a_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_11a_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlPad4 0 0 0 
+ctlIndex5G_HT20_mode_0_A_0_0 2 
+ctlIndex5G_HT20_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex5G_HT20_numChMask_0_A_0_0 0x2 
+ctlIndex5G_HT20_numSSMask_0_A_0_0 0x1 
+ctlIndex5G_HT20_mode_1_A_0_0 2 
+ctlIndex5G_HT20_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex5G_HT20_numChMask_1_A_0_0 0x2 
+ctlIndex5G_HT20_numSSMask_1_A_0_0 0x2 
+ctlIndex5G_HT20_mode_2_A_0_0 2 
+ctlIndex5G_HT20_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex5G_HT20_numChMask_2_A_0_0 0x1 
+ctlIndex5G_HT20_numSSMask_2_A_0_0 0x1 
+ctlIndex5G_HT20_mode_3_A_0_0 2 
+ctlIndex5G_HT20_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
+ctlIndex5G_HT20_numChMask_3_A_0_0 0x2 
+ctlIndex5G_HT20_numSSMask_3_A_0_0 0x1 
+ctlIndex5G_HT20_mode_4_A_0_0 2 
+ctlIndex5G_HT20_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex5G_HT20_numChMask_4_A_0_0 0x2 
+ctlIndex5G_HT20_numSSMask_4_A_0_0 0x1 
+ctlIndex5G_HT20_mode_5_A_0_0 2 
+ctlIndex5G_HT20_bf_reg_5_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex5G_HT20_numChMask_5_A_0_0 0x2 
+ctlIndex5G_HT20_numSSMask_5_A_0_0 0x2 
+ctlIndex5G_HT20_mode_6_A_0_0 2 
+ctlIndex5G_HT20_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex5G_HT20_numChMask_6_A_0_0 0x1 
+ctlIndex5G_HT20_numSSMask_6_A_0_0 0x1 
+ctlIndex5G_HT20_mode_7_A_0_0 2 
+ctlIndex5G_HT20_bf_reg_7_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
+ctlIndex5G_HT20_numChMask_7_A_0_0 0x2 
+ctlIndex5G_HT20_numSSMask_7_A_0_0 0x1 
+ctlIndex5G_HT20_mode_8_A_0_0 2 
+ctlIndex5G_HT20_bf_reg_8_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex5G_HT20_numChMask_8_A_0_0 0x2 
+ctlIndex5G_HT20_numSSMask_8_A_0_0 0x1 
+ctlIndex5G_HT20_mode_9_A_0_0 2 
+ctlIndex5G_HT20_bf_reg_9_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex5G_HT20_numChMask_9_A_0_0 0x2 
+ctlIndex5G_HT20_numSSMask_9_A_0_0 0x2 
+ctlIndex5G_HT20_mode_10_A_0_0 2 
+ctlIndex5G_HT20_bf_reg_10_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex5G_HT20_numChMask_10_A_0_0 0x1 
+ctlIndex5G_HT20_numSSMask_10_A_0_0 0x1 
+ctlIndex5G_HT20_mode_11_A_0_0 2 
+ctlIndex5G_HT20_bf_reg_11_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
+ctlIndex5G_HT20_numChMask_11_A_0_0 0x2 
+ctlIndex5G_HT20_numSSMask_11_A_0_0 0x1 
+ctlFreqbin5G_HT20_A_0_0 76 80 84 88 92 96 100 104 140 144 148 152 156 160 164 168 172 176 180 184 189 193 197 201 205 255 255 255 255 
+ctl5GHT20Reserved_A_0_0 0 0 0 
+ctlData5G_HT20_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_HT20_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_HT20_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_HT20_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_HT20_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_HT20_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_HT20_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_HT20_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_HT20_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_HT20_9_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_HT20_10_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlData5G_HT20_11_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
+ctlIndex5G_HT40_mode_0_A_0_0 3 
+ctlIndex5G_HT40_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex5G_HT40_numChMask_0_A_0_0 0x2 
+ctlIndex5G_HT40_numSSMask_0_A_0_0 0x1 
+ctlIndex5G_HT40_mode_1_A_0_0 3 
+ctlIndex5G_HT40_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex5G_HT40_numChMask_1_A_0_0 0x2 
+ctlIndex5G_HT40_numSSMask_1_A_0_0 0x2 
+ctlIndex5G_HT40_mode_2_A_0_0 3 
+ctlIndex5G_HT40_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex5G_HT40_numChMask_2_A_0_0 0x1 
+ctlIndex5G_HT40_numSSMask_2_A_0_0 0x1 
+ctlIndex5G_HT40_mode_3_A_0_0 3 
+ctlIndex5G_HT40_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
+ctlIndex5G_HT40_numChMask_3_A_0_0 0x2 
+ctlIndex5G_HT40_numSSMask_3_A_0_0 0x1 
+ctlIndex5G_HT40_mode_4_A_0_0 3 
+ctlIndex5G_HT40_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex5G_HT40_numChMask_4_A_0_0 0x2 
+ctlIndex5G_HT40_numSSMask_4_A_0_0 0x1 
+ctlIndex5G_HT40_mode_5_A_0_0 3 
+ctlIndex5G_HT40_bf_reg_5_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex5G_HT40_numChMask_5_A_0_0 0x2 
+ctlIndex5G_HT40_numSSMask_5_A_0_0 0x2 
+ctlIndex5G_HT40_mode_6_A_0_0 3 
+ctlIndex5G_HT40_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex5G_HT40_numChMask_6_A_0_0 0x1 
+ctlIndex5G_HT40_numSSMask_6_A_0_0 0x1 
+ctlIndex5G_HT40_mode_7_A_0_0 3 
+ctlIndex5G_HT40_bf_reg_7_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
+ctlIndex5G_HT40_numChMask_7_A_0_0 0x2 
+ctlIndex5G_HT40_numSSMask_7_A_0_0 0x1 
+ctlIndex5G_HT40_mode_8_A_0_0 3 
+ctlIndex5G_HT40_bf_reg_8_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex5G_HT40_numChMask_8_A_0_0 0x2 
+ctlIndex5G_HT40_numSSMask_8_A_0_0 0x1 
+ctlIndex5G_HT40_mode_9_A_0_0 3 
+ctlIndex5G_HT40_bf_reg_9_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex5G_HT40_numChMask_9_A_0_0 0x2 
+ctlIndex5G_HT40_numSSMask_9_A_0_0 0x2 
+ctlIndex5G_HT40_mode_10_A_0_0 3 
+ctlIndex5G_HT40_bf_reg_10_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex5G_HT40_numChMask_10_A_0_0 0x1 
+ctlIndex5G_HT40_numSSMask_10_A_0_0 0x1 
+ctlIndex5G_HT40_mode_11_A_0_0 3 
+ctlIndex5G_HT40_bf_reg_11_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
+ctlIndex5G_HT40_numChMask_11_A_0_0 0x2 
+ctlIndex5G_HT40_numSSMask_11_A_0_0 0x1 
+ctlFreqbin5G_HT40_A_0_0 78 82 86 90 94 98 102 142 146 150 154 158 162 166 170 174 178 182 191 195 199 203 
+ctl5GHT40Reserved_A_0_0 0 0 
+ctlData5G_HT40_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_HT40_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_HT40_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_HT40_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_HT40_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_HT40_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_HT40_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_HT40_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_HT40_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_HT40_9_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_HT40_10_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_HT40_11_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlIndex5G_VHT80_mode_0_A_0_0 4 
+ctlIndex5G_VHT80_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex5G_VHT80_numChMask_0_A_0_0 0x2 
+ctlIndex5G_VHT80_numSSMask_0_A_0_0 0x1 
+ctlIndex5G_VHT80_mode_1_A_0_0 4 
+ctlIndex5G_VHT80_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex5G_VHT80_numChMask_1_A_0_0 0x2 
+ctlIndex5G_VHT80_numSSMask_1_A_0_0 0x2 
+ctlIndex5G_VHT80_mode_2_A_0_0 4 
+ctlIndex5G_VHT80_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex5G_VHT80_numChMask_2_A_0_0 0x1 
+ctlIndex5G_VHT80_numSSMask_2_A_0_0 0x1 
+ctlIndex5G_VHT80_mode_3_A_0_0 4 
+ctlIndex5G_VHT80_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
+ctlIndex5G_VHT80_numChMask_3_A_0_0 0x2 
+ctlIndex5G_VHT80_numSSMask_3_A_0_0 0x1 
+ctlIndex5G_VHT80_mode_4_A_0_0 4 
+ctlIndex5G_VHT80_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex5G_VHT80_numChMask_4_A_0_0 0x2 
+ctlIndex5G_VHT80_numSSMask_4_A_0_0 0x1 
+ctlIndex5G_VHT80_mode_5_A_0_0 4 
+ctlIndex5G_VHT80_bf_reg_5_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex5G_VHT80_numChMask_5_A_0_0 0x2 
+ctlIndex5G_VHT80_numSSMask_5_A_0_0 0x2 
+ctlIndex5G_VHT80_mode_6_A_0_0 4 
+ctlIndex5G_VHT80_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex5G_VHT80_numChMask_6_A_0_0 0x1 
+ctlIndex5G_VHT80_numSSMask_6_A_0_0 0x1 
+ctlIndex5G_VHT80_mode_7_A_0_0 4 
+ctlIndex5G_VHT80_bf_reg_7_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
+ctlIndex5G_VHT80_numChMask_7_A_0_0 0x2 
+ctlIndex5G_VHT80_numSSMask_7_A_0_0 0x1 
+ctlIndex5G_VHT80_mode_8_A_0_0 4 
+ctlIndex5G_VHT80_bf_reg_8_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex5G_VHT80_numChMask_8_A_0_0 0x2 
+ctlIndex5G_VHT80_numSSMask_8_A_0_0 0x1 
+ctlIndex5G_VHT80_mode_9_A_0_0 4 
+ctlIndex5G_VHT80_bf_reg_9_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex5G_VHT80_numChMask_9_A_0_0 0x2 
+ctlIndex5G_VHT80_numSSMask_9_A_0_0 0x2 
+ctlIndex5G_VHT80_mode_10_A_0_0 4 
+ctlIndex5G_VHT80_bf_reg_10_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex5G_VHT80_numChMask_10_A_0_0 0x1 
+ctlIndex5G_VHT80_numSSMask_10_A_0_0 0x1 
+ctlIndex5G_VHT80_mode_11_A_0_0 4 
+ctlIndex5G_VHT80_bf_reg_11_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
+ctlIndex5G_VHT80_numChMask_11_A_0_0 0x2 
+ctlIndex5G_VHT80_numSSMask_11_A_0_0 0x1 
+ctlFreqbin5G_VHT80_A_0_0 82 86 90 94 98 146 150 154 158 162 166 170 174 178 195 199 
+ctlData5G_VHT80_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80_9_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80_10_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80_11_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_0_A_0_0 7 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_0_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_0_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_1_A_0_0 7 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_1_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_1_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_1_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_2_A_0_0 7 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_2_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_2_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_3_A_0_0 7 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_3_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_3_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_4_A_0_0 7 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_4_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_4_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_5_A_0_0 7 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_5_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_5_A_0_0 0x2 
+ctlModeExt5G_PrimaryLowerFreq_A_0_0 8 8 8 8 8 8 
+ctlFreqbin5G_VHT80p80_PrimaryLowerFreq_A_0_0 90 154 158 162 166 170 
+ctlData5G_VHT80p80_PrimaryLowerFreq_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80p80_PrimaryLowerFreq_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80p80_PrimaryLowerFreq_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80p80_PrimaryLowerFreq_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80p80_PrimaryLowerFreq_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80p80_PrimaryLowerFreq_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_0_A_0_0 7 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_0_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_0_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_1_A_0_0 7 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_1_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_1_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_1_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_2_A_0_0 7 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_2_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_2_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_3_A_0_0 7 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_3_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_3_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_4_A_0_0 7 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_4_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_4_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_5_A_0_0 7 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_5_A_0_0 0x2 
+ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_5_A_0_0 0x2 
+ctlModeExt5G_VHT80p80_PrimaryHigherFreq_A_0_0 9 9 9 9 9 9 
+ctlFreqbin5G_VHT80p80_PrimaryHigherFreq_A_0_0 90 154 158 162 166 170 
+ctlData5G_VHT80p80_PrimaryHigherFreq_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80p80_PrimaryHigherFreq_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80p80_PrimaryHigherFreq_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80p80_PrimaryHigherFreq_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80p80_PrimaryHigherFreq_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT80p80_PrimaryHigherFreq_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlIndex5G_VHT160_mode_0_A_0_0 6 
+ctlIndex5G_VHT160_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
+ctlIndex5G_VHT160_numChMask_0_A_0_0 0x2 
+ctlIndex5G_VHT160_numSSMask_0_A_0_0 0x2 
+ctlIndex5G_VHT160_mode_1_A_0_0 6 
+ctlIndex5G_VHT160_bf_reg_1_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
+ctlIndex5G_VHT160_numChMask_1_A_0_0 0x2 
+ctlIndex5G_VHT160_numSSMask_1_A_0_0 0x2 
+ctlIndex5G_VHT160_mode_2_A_0_0 6 
+ctlIndex5G_VHT160_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
+ctlIndex5G_VHT160_numChMask_2_A_0_0 0x2 
+ctlIndex5G_VHT160_numSSMask_2_A_0_0 0x2 
+ctlIndex5G_VHT160_mode_3_A_0_0 6 
+ctlIndex5G_VHT160_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
+ctlIndex5G_VHT160_numChMask_3_A_0_0 0x2 
+ctlIndex5G_VHT160_numSSMask_3_A_0_0 0x2 
+ctlIndex5G_VHT160_mode_4_A_0_0 6 
+ctlIndex5G_VHT160_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
+ctlIndex5G_VHT160_numChMask_4_A_0_0 0x2 
+ctlIndex5G_VHT160_numSSMask_4_A_0_0 0x2 
+ctlIndex5G_VHT160_mode_5_A_0_0 6 
+ctlIndex5G_VHT160_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
+ctlIndex5G_VHT160_numChMask_5_A_0_0 0x2 
+ctlIndex5G_VHT160_numSSMask_5_A_0_0 0x2 
+ctlFreqbin5G_VHT160_A_0_0 90 154 158 162 166 170 
+ctl5GVHT160Reserved_A_0_0 0 0 
+ctlData5G_VHT160_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT160_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT160_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT160_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT160_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlData5G_VHT160_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
+ctlSpare5G 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+nvSARId__0_0 13 
+nvSARLen__0_0 44 
+nvSARFlag__0_0 0x0 
+CCK2gLimit_B0_0_0 0x3c 
+Ofdm2gLimit_B0_0_0 0x3c 
+Ofdm5gLimit_B0_0_0 0x3c 
+pad_B0_0_0 0 
+CCK2gLimit_B1_0_0 0x3c 
+Ofdm2gLimit_B1_0_0 0x3c 
+Ofdm5gLimit_B1_0_0 0x3c 
+pad_B1_0_0 0 
+CCK2gLimit_B0_1_0 0x3c 
+Ofdm2gLimit_B0_1_0 0x3c 
+Ofdm5gLimit_B0_1_0 0x3c 
+pad_B0_1_0 0 
+CCK2gLimit_B1_1_0 0x3c 
+Ofdm2gLimit_B1_1_0 0x3c 
+Ofdm5gLimit_B1_1_0 0x3c 
+pad_B1_1_0 0 
+CCK2gLimit_B0_2_0 0x3c 
+Ofdm2gLimit_B0_2_0 0x3c 
+Ofdm5gLimit_B0_2_0 0x3c 
+pad_B0_2_0 0 
+CCK2gLimit_B1_2_0 0x3c 
+Ofdm2gLimit_B1_2_0 0x3c 
+Ofdm5gLimit_B1_2_0 0x3c 
+pad_B1_2_0 0 
+CCK2gLimit_B0_3_0 0x3c 
+Ofdm2gLimit_B0_3_0 0x3c 
+Ofdm5gLimit_B0_3_0 0x3c 
+pad_B0_3_0 0 
+CCK2gLimit_B1_3_0 0x3c 
+Ofdm2gLimit_B1_3_0 0x3c 
+Ofdm5gLimit_B1_3_0 0x3c 
+pad_B1_3_0 0 
+CCK2gLimit_B0_4_0 0x3c 
+Ofdm2gLimit_B0_4_0 0x3c 
+Ofdm5gLimit_B0_4_0 0x3c 
+pad_B0_4_0 0 
+CCK2gLimit_B1_4_0 0x3c 
+Ofdm2gLimit_B1_4_0 0x3c 
+Ofdm5gLimit_B1_4_0 0x3c 
+pad_B1_4_0 0 
+nvRxGainId__0_0 14 
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+rttTxDeltaPefOn_Ht20_20_40_T1_0_0 208 0 
+rttTxDeltaPefOn_Vht20_20_40_T1_0_0 208 0 
+rttTxDeltaPefOn_Dup40_40_40_T1_0_0 208 
+rttTxDeltaPefOn_Ht40_40_40_T1_0_0 208 
+rttTxDeltaPefOn_Vht40_24_40_T1_0_0 208 
+rttTxDeltaPefOn_rttDelay_20_40Reserved_T1_0_0 0x0 0x0 
+rttTxDeltaTxiqOn_Legacy_20_40_T1_0_0 250 0 
+rttTxDeltaTxiqOn_Ht20_20_40_T1_0_0 250 0 
+rttTxDeltaTxiqOn_Vht20_20_40_T1_0_0 250 0 
+rttTxDeltaTxiqOn_Dup40_40_40_T1_0_0 250 
+rttTxDeltaTxiqOn_Ht40_40_40_T1_0_0 250 
+rttTxDeltaTxiqOn_Vht40_24_40_T1_0_0 250 
+rttTxDeltaTxiqOn_rttDelay_20_40Reserved_T1_0_0 0x0 0x0 
+rttRxDeltaRxiqOn7Tap_Legacy_20_40_T1_0_0 333 0 
+rttRxDeltaRxiqOn7Tap_Ht20_20_40_T1_0_0 333 0 
+rttRxDeltaRxiqOn7Tap_Vht20_20_40_T1_0_0 333 0 
+rttRxDeltaRxiqOn7Tap_Dup40_40_40_T1_0_0 333 
+rttRxDeltaRxiqOn7Tap_Ht40_40_40_T1_0_0 333 
+rttRxDeltaRxiqOn7Tap_Vht40_24_40_T1_0_0 333 
+rttRxDeltaRxiqOn7Tap_rttDelay_20_40Reserved_T1_0_0 0x0 0x0 
+rttDelaysFuture2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+nvConfigAddrId__0_0 16 
+nvConfigAddrLen__0_0 2052 
+nvConfigAddrFlag__0_0 0x0 
+configAddr__0_0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 
+nvAteId__0_0 17 
+nvAteLen__0_0 68 
+nvAteFlag__0_0 0x0 
+configFlag__0_0 0x0 
+rbias__0_0 0x0 
+tempSlopeCharacterized__0_0 0x0 
+chipCalDataReserved__0_0 0x0 
+ateCALTemp_B0_0_0 0 
+ateChainThermCode_B0_0_0 0 
+pad_B0_0_0 0 0 
+ateCALTemp_B1_0_0 0 
+ateChainThermCode_B1_0_0 0 
+pad_B1_0_0 0 0 
+thermAdcScaledGain_T0_0_0 0 0 
+thermAdcOffset_T0_0_0 0 0 
+chipCalDataPerPhyReserved_T0_0_0 0x0 0x0 
+thermAdcScaledGain_T1_0_0 0 0 
+thermAdcOffset_T1_0_0 0 0 
+chipCalDataPerPhyReserved_T1_0_0 0x0 0x0 
+ate_reserved 0 0 0 0 0 0 0 0 0 0 0 0 
+ateFuture 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
diff --git a/db845c/firmware/cdsp.b00 b/db845c/firmware/cdsp.b00
new file mode 100644
index 0000000..a58b080
--- /dev/null
+++ b/db845c/firmware/cdsp.b00
Binary files differ
diff --git a/db845c/firmware/cdsp.b01 b/db845c/firmware/cdsp.b01
new file mode 100644
index 0000000..6d6d277
--- /dev/null
+++ b/db845c/firmware/cdsp.b01
Binary files differ
diff --git a/db845c/firmware/cdsp.b02 b/db845c/firmware/cdsp.b02
new file mode 100644
index 0000000..69319a4
--- /dev/null
+++ b/db845c/firmware/cdsp.b02
Binary files differ
diff --git a/db845c/firmware/cdsp.b03 b/db845c/firmware/cdsp.b03
new file mode 100644
index 0000000..54c48df
--- /dev/null
+++ b/db845c/firmware/cdsp.b03
Binary files differ
diff --git a/db845c/firmware/cdsp.b04 b/db845c/firmware/cdsp.b04
new file mode 100644
index 0000000..e8d3bc5
--- /dev/null
+++ b/db845c/firmware/cdsp.b04
Binary files differ
diff --git a/db845c/firmware/cdsp.b05 b/db845c/firmware/cdsp.b05
new file mode 100644
index 0000000..706ea99
--- /dev/null
+++ b/db845c/firmware/cdsp.b05
Binary files differ
diff --git a/db845c/firmware/cdsp.b06 b/db845c/firmware/cdsp.b06
new file mode 100644
index 0000000..ea6cb88
--- /dev/null
+++ b/db845c/firmware/cdsp.b06
Binary files differ
diff --git a/db845c/firmware/cdsp.b08 b/db845c/firmware/cdsp.b08
new file mode 100644
index 0000000..d20b791
--- /dev/null
+++ b/db845c/firmware/cdsp.b08
Binary files differ
diff --git a/db845c/firmware/cdsp.mdt b/db845c/firmware/cdsp.mdt
new file mode 100644
index 0000000..9915c6e
--- /dev/null
+++ b/db845c/firmware/cdsp.mdt
Binary files differ
diff --git a/db845c/firmware/devcfg.mbn b/db845c/firmware/devcfg.mbn
new file mode 100644
index 0000000..3f8e6ef
--- /dev/null
+++ b/db845c/firmware/devcfg.mbn
Binary files differ
diff --git a/db845c/firmware/device.mk b/db845c/firmware/device.mk
new file mode 100644
index 0000000..bf7999b
--- /dev/null
+++ b/db845c/firmware/device.mk
@@ -0,0 +1,107 @@
+# Install firmware files copied over from
+# http://releases.linaro.org/96boards/dragonboard845c/qualcomm/firmware/RB3_firmware_20190529180356-v3.zip
+
+# Adreno
+PRODUCT_PACKAGES :=	\
+    a630_gmu.bin	\
+    a630_sqe.fw	\
+    a630_zap.b00	\
+    a630_zap.b01	\
+    a630_zap.b02	\
+    a630_zap.elf	\
+    a630_zap.mdt
+
+# DSP (adsp+cdsp)
+PRODUCT_PACKAGES +=	\
+    adsp.b00		\
+    adsp.b01		\
+    adsp.b02		\
+    adsp.b03		\
+    adsp.b04		\
+    adsp.b05		\
+    adsp.b06		\
+    adsp.b07		\
+    adsp.b08		\
+    adsp.b09		\
+    adsp.b10		\
+    adsp.b11		\
+    adsp.b12		\
+    adsp.b13		\
+    adsp.mdt		\
+    cdsp.b00		\
+    cdsp.b01		\
+    cdsp.b02		\
+    cdsp.b03		\
+    cdsp.b04		\
+    cdsp.b05		\
+    cdsp.b06		\
+    cdsp.b08		\
+    cdsp.mdt
+
+# USB (USB Host to PCIE)
+# For Ethernet and one of the USB-A host port to work
+PRODUCT_PACKAGES +=	\
+    K2026090.mem
+
+# I2C/SPI fix
+PRODUCT_PACKAGES +=	\
+    devcfg.mbn
+
+# Venus
+# Video encoder/decoder accelerator
+PRODUCT_PACKAGES +=	\
+    venus.b00		\
+    venus.b01		\
+    venus.b02		\
+    venus.b03		\
+    venus.b04		\
+    venus.mdt
+
+# Wlan
+PRODUCT_PACKAGES +=	\
+    bdwlan.102		\
+    bdwlan.104		\
+    bdwlan.105		\
+    bdwlan.106		\
+    bdwlan.107		\
+    bdwlan.108		\
+    bdwlan.109		\
+    bdwlan.10b		\
+    bdwlan.10c		\
+    bdwlan.b04		\
+    bdwlan.b07		\
+    bdwlan.b09		\
+    bdwlan.b0a		\
+    bdwlan.b0b		\
+    bdwlan.b0d		\
+    bdwlan.b0e		\
+    bdwlan.b0f		\
+    bdwlan.b14		\
+    bdwlan.b15		\
+    bdwlan.b30		\
+    bdwlan.b31		\
+    bdwlan.b32		\
+    bdwlan.b33		\
+    bdwlan.b34		\
+    bdwlan.b35		\
+    bdwlan.b36		\
+    bdwlan.b37		\
+    bdwlan.b38		\
+    bdwlan.b39		\
+    bdwlan.b3a		\
+    bdwlan.b3c		\
+    bdwlan.b3d		\
+    bdwlan.b3e		\
+    bdwlan.b3f		\
+    bdwlan.b41		\
+    bdwlan.b42		\
+    bdwlan.b45		\
+    bdwlan.b70		\
+    bdwlan.bin		\
+    bdwlan.txt		\
+    wlanmdsp.mbn
+
+# License
+# Necessary to bundle license with firmware files
+PRODUCT_PACKAGES +=	\
+    LICENSE.qcom.txt
diff --git a/db845c/firmware/qcom/Android.mk b/db845c/firmware/qcom/Android.mk
new file mode 100644
index 0000000..6f725c0
--- /dev/null
+++ b/db845c/firmware/qcom/Android.mk
@@ -0,0 +1,6 @@
+LOCAL_PATH := $(call my-dir)
+
+# If some modules are built directly from this directory (not subdirectories),
+# their rules should be written here.
+
+include $(call all-makefiles-under,$(LOCAL_PATH))
diff --git a/db845c/firmware/qcom/venus-5.2/Android.mk b/db845c/firmware/qcom/venus-5.2/Android.mk
new file mode 100644
index 0000000..4047e15
--- /dev/null
+++ b/db845c/firmware/qcom/venus-5.2/Android.mk
@@ -0,0 +1,13 @@
+LOCAL_PATH := $(call my-dir)
+
+include device/linaro/dragonboard/utils.mk
+
+firmware_files_venus :=	\
+    venus.b00		\
+    venus.b01		\
+    venus.b02		\
+    venus.b03		\
+    venus.b04		\
+    venus.mdt
+
+$(foreach f, $(firmware_files_venus), $(call add-qcom-firmware, $(f), $(TARGET_OUT_VENDOR)/firmware/qcom/venus-5.2/))
diff --git a/db845c/firmware/qcom/venus-5.2/NOTICE b/db845c/firmware/qcom/venus-5.2/NOTICE
new file mode 100644
index 0000000..c880572
--- /dev/null
+++ b/db845c/firmware/qcom/venus-5.2/NOTICE
@@ -0,0 +1,206 @@
+PLEASE READ THIS LICENSE AGREEMENT ("AGREEMENT") CAREFULLY.  THIS AGREEMENT IS
+A BINDING LEGAL AGREEMENT ENTERED INTO BY AND BETWEEN YOU (OR IF YOU ARE
+ENTERING INTO THIS AGREEMENT ON BEHALF OF AN ENTITY, THEN THE ENTITY THAT YOU
+REPRESENT) AND QUALCOMM TECHNOLOGIES, INC. ("QTI" "WE" "OUR" OR "US").  THIS IS
+THE AGREEMENT THAT APPLIES TO YOUR USE OF THE DESIGNATED AND/OR LINKED
+APPLICATIONS, THE ENCLOSED QUALCOMM TECHNOLOGIES' MATERIALS, INCLUDING RELATED
+DOCUMENTATION AND ANY UPDATES OR IMPROVEMENTS THEREOF
+(COLLECTIVELY, "MATERIALS").  BY USING OR COMPLETING THE INSTALLATION OF THE
+MATERIALS, YOU ARE ACCEPTING THIS AGREEMENT AND YOU AGREE TO BE BOUND BY ITS
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+AND DOES NOT LICENSE THE MATERIALS TO YOU. IF YOU DO NOT AGREE TO THESE TERMS
+YOU MUST DISCONTINUE THE INSTALLATION PROCESS AND YOU MAY NOT USE THE MATERIALS
+OR RETAIN ANY COPIES OF THE MATERIALS. ANY USE OR POSSESSION OF THE MATERIALS
+BY YOU IS SUBJECT TO THE TERMS AND CONDITIONS SET FORTH IN THIS AGREEMENT.
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+1. RIGHT TO USE DELIVERABLES; RESTRICTIONS.
+
+  1.1 License.  Subject to the terms and conditions of this Agreement,
+  including, without limitation, the restrictions, conditions, limitations and
+  exclusions set forth in this Agreement, QTI hereby grants to you a
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+  may only be distributed in binary format and may not be distributed in source
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+  1.5 Feedback.  QTI may from time to time receive suggestions, feedback or
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+3. NO OTHER LICENSES OR INTELLECTUAL PROPERTY RIGHTS. Neither this Agreement,
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+6. INDEMNIFICATION.  You agree to indemnify and hold harmless QTI and its
+officers, directors, employees and successors and assigns against any and all
+third party claims, demands, causes of action, losses, liabilities, damages,
+costs and expenses, incurred by QTI (including but not limited to costs of
+defense, investigation and reasonable attorney's fees) arising out of, resulting
+from or related to: (i) any breach of this Agreement by You; and (ii) your acts,
+omissions, products and services.  If requested by QTI, You agree to defend QTI
+in connection with any third party claims, demands, or causes of action
+resulting from, arising out of or in connection with any of the foregoing.
+
+7. ASSIGNMENT.  You shall not assign this Agreement or any right or interest
+under this Agreement, nor delegate any obligation to be performed under this
+Agreement, without QTI's prior written consent.  For purposes of this Section 7,
+an "assignment" by You under this Section shall be deemed to include, without
+limitation, any merger, consolidation, sale of all or substantially all of its
+assets, or any substantial change in the management or control of You.
+Any attempted assignment in contravention of this Section 9 shall be void.
+QTI may freely assign this Agreement or delegate any or all of its rights and
+obligations hereunder to any third party.
+
+8. COMPLIANCE WITH LAWS; APPLICABLE LAW.  You agree to comply with all
+applicable local, international and national laws and regulations and with U.S.
+Export Administration Regulations, as they apply to the subject matter of this
+Agreement.  This Agreement is governed by the laws of the State of California,
+excluding California's choice of law rules.
+
+9. CONTRACTING PARTIES.  If the Materials are downloaded on any computer owned
+by a corporation or other legal entity, then this Agreement is formed by and
+between QTI and such entity.  The individual accepting the terms of this
+Agreement represents and warrants to QTI that they have the authority to bind
+such entity to the terms and conditions of this Agreement.
+
+10. MISCELLANEOUS PROVISIONS.  This Agreement, together with all exhibits
+attached hereto, which are incorporated herein by this reference, constitutes
+the entire agreement between QTI and You and supersedes all prior negotiations,
+representations and agreements between the parties with respect to the subject
+matter hereof.  No addition or modification of this Agreement shall be effective
+unless made in writing and signed by the respective representatives of QTI and
+You.  The restrictions, limitations, exclusions and conditions set forth in this
+Agreement shall apply even if QTI or any of its affiliates becomes aware of or
+fails to act in a manner to address any violation or failure to comply
+therewith.  You hereby acknowledge and agree that the restrictions, limitations,
+conditions and exclusions imposed in this Agreement on the rights granted in
+this Agreement are not a derogation of the benefits of such rights.  You further
+acknowledges that, in the absence of such restrictions, limitations, conditions
+and exclusions, QTI would not have entered into this Agreement with You.  Each
+party shall be responsible for and shall bear its own expenses in connection
+with this Agreement.  If any of the provisions of this Agreement are determined
+to be invalid, illegal, or otherwise unenforceable, the remaining provisions
+shall remain in full force and effect.  This Agreement is entered into solely
+in the English language, and if for any reason any other language version is
+prepared by any party, it shall be solely for convenience and the English
+version shall govern and control all aspects.  If You are located in the
+province of Quebec, Canada, the following applies: The Parties hereby confirm
+they have requested this Agreement and all related documents be prepared
+in English..
\ No newline at end of file
diff --git a/db845c/firmware/qcom/venus-5.2/venus.b00 b/db845c/firmware/qcom/venus-5.2/venus.b00
new file mode 100644
index 0000000..41b63be
--- /dev/null
+++ b/db845c/firmware/qcom/venus-5.2/venus.b00
Binary files differ
diff --git a/db845c/firmware/qcom/venus-5.2/venus.b01 b/db845c/firmware/qcom/venus-5.2/venus.b01
new file mode 100644
index 0000000..a9bae79
--- /dev/null
+++ b/db845c/firmware/qcom/venus-5.2/venus.b01
Binary files differ
diff --git a/db845c/firmware/qcom/venus-5.2/venus.b02 b/db845c/firmware/qcom/venus-5.2/venus.b02
new file mode 100644
index 0000000..22052a0
--- /dev/null
+++ b/db845c/firmware/qcom/venus-5.2/venus.b02
Binary files differ
diff --git a/db845c/firmware/qcom/venus-5.2/venus.b03 b/db845c/firmware/qcom/venus-5.2/venus.b03
new file mode 100644
index 0000000..2ad2108
--- /dev/null
+++ b/db845c/firmware/qcom/venus-5.2/venus.b03
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diff --git a/db845c/firmware/qcom/venus-5.2/venus.b04 b/db845c/firmware/qcom/venus-5.2/venus.b04
new file mode 100644
index 0000000..90c7fc9
--- /dev/null
+++ b/db845c/firmware/qcom/venus-5.2/venus.b04
Binary files differ
diff --git a/db845c/firmware/qcom/venus-5.2/venus.mdt b/db845c/firmware/qcom/venus-5.2/venus.mdt
new file mode 100644
index 0000000..3e39973
--- /dev/null
+++ b/db845c/firmware/qcom/venus-5.2/venus.mdt
Binary files differ
diff --git a/db845c/firmware/wlanmdsp.mbn b/db845c/firmware/wlanmdsp.mbn
new file mode 100644
index 0000000..1e3251c
--- /dev/null
+++ b/db845c/firmware/wlanmdsp.mbn
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diff --git a/utils.mk b/utils.mk
new file mode 100644
index 0000000..04679fe
--- /dev/null
+++ b/utils.mk
@@ -0,0 +1,15 @@
+# Put common makefile/build helper Macros here
+
+# $(1): The source file name in LOCAL_PATH.
+#       It also serves as the module name and the dest file name.
+# $(2): Module installation path.
+define add-qcom-firmware
+$(eval include $(CLEAR_VARS))\
+$(eval LOCAL_MODULE := $(1))\
+$(eval LOCAL_SRC_FILES := $(1))\
+$(eval LOCAL_MODULE_STEM := $(1))\
+$(eval LOCAL_MODULE_CLASS := DATA)\
+$(eval LOCAL_MODULE_TAGS := optional)\
+$(eval LOCAL_MODULE_PATH := $(2))\
+$(eval include $(BUILD_PREBUILT))
+endef